SoC Analog Voltage Control Bypassing Handshake Latency

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Solution Overview

Problem

Conventional SoC systems experience inefficiencies and power waste due to latency in voltage transition during Dynamic Voltage and Frequency Scaling (DVFS) processes, primarily attributed to handshake protocol overhead, voltage regulator response time, and voltage ramp delays.

Innovation Solution

The system bypasses the protocol handshake by having the SoC device generate desired analog voltage signals using a Digital-to-Analog Converter (DAC) unit, which are then directly sent to the voltage regulator, allowing for immediate voltage regulation without the need for interfacing protocols.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If handshake protocol is used for voltage regulation, then voltage control reliability is improved, but voltage transition latency increases

Engineering Contradiction:

Improvevoltage control reliabilityVSAvoidvoltage transition latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and eliminates the handshake protocol from the voltage regulation process. By removing this intermediate communication layer, the system achieves direct voltage control from the SoC device to the voltage regulator, significantly reducing the time latency while maintaining control reliability through direct digital signal manipulation.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical handshake protocol (serial communication based on i2c or SPMI) with a direct digital signal approach. The SoC device directly generates and sends digital voltage control signals to the voltage regulator via a digital signal line, substituting the multi-step mechanical negotiation process with immediate digital signal transmission.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Speed

If voltage regulator response time is reduced, then system responsiveness is improved, but control precision may be compromised

Engineering Contradiction:

Improvevoltage regulator response speedVSAvoidvoltage control precision

Core Design Contradiction:

SpeedVSMeasurement precision

Solution Approach 1:

The patent implements preliminary action by having the SoC device pre-calculate and directly generate the exact digital voltage control signals needed before the voltage regulator needs to respond. This proactive approach eliminates the sequential response delay while maintaining precision through direct digital signal specification.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent replaces the sequential mechanical response protocol with direct digital signal generation. The SoC device directly outputs the precise voltage control values as digital signals, eliminating the time-consuming mechanical negotiation and achieving both fast response and high precision through direct digital control.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Speed

If voltage ramp rate is increased, then voltage transition speed is improved, but power consumption increases

Engineering Contradiction:

Improvevoltage transition speedVSAvoidpower consumption during voltage transition

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by enabling the voltage regulator to dynamically adjust its operation based on real-time SoC device needs. Through direct digital control signals, the system can dynamically increase the voltage ramp rate when speed is critical and reduce it when power efficiency is prioritized, optimizing the trade-off between transition speed and power consumption.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the control parameter from protocol-based sequential control to direct digital signal control. This allows the voltage regulator to receive precise digital commands that directly specify the desired voltage and transition characteristics, enabling optimized parameter adjustment for minimal power consumption during voltage transitions.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces voltage transition latency, enhancing system responsiveness and energy efficiency by eliminating the delays associated with handshake protocols and voltage regulator response times.

Implementation Method 1

The SoC device generates desired analog voltage signals and sends them to a voltage regulator via a Digital-to-Analog Converter (DAC) unit

Methodology Applied

Scientific EffectDigital-to-Analog Conversion:

Data Source

PatentUS12235700B2System and method for dynamic voltage control

Publication Date: 2025.02.25 META PLATFORMS TECHNOLOGIES LLC

AI summary

The present disclosure relates to a system and a method for regulating an output voltage to a requested target voltage. The system includes a System-on-a-Chip (SoC) device and a Power Management Integrated Circuit (PMIC) having a voltage regulator. The SoC device configured to receive a requested target voltage, generates an analog voltage signal that steps up or down over time until the analog voltage signal corresponds to the requested target voltage, and outputs the analog voltage signal. The voltage regulator is configured to reference the analog voltage signal from the SoC device and supply a corresponding regulated output voltage to the SoC device.