Assertion-Based Verification for System-on-Chip Design
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Solution Overview
Problem
Current methods for functional verification of System-on-a-Chip (SOC) devices often rely on insufficient assertion generation, leading to inadequate evaluation of complex digital systems, as they assume uniform delays and fail to account for specific logic and net delays, resulting in incomplete verification of behaviors and potential flaws.
Innovation Solution
The proposed solution involves analyzing verification logs to identify patterns of triggered and untriggered assertions across SOC blocks, categorizing these signatures based on behaviors, and storing them in a database, which enables the automatic generation of assertions and improves the efficiency of functional verification by correlating stimuli with assertion triggers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If current assertion generation methods are used, then verification process is simple, but verification accuracy is insufficient
Solution Approach 1:
The system implements feedback by analyzing verification logs to identify patterns of triggered and untriggered assertions, then using this information to automatically generate new assertions. This closed-loop approach continuously improves verification accuracy by learning from previous verification results and incorporating insights into subsequent verification cycles.
Solution Approach 2:
The verification system performs self-service by automatically generating assertions based on patterns detected in verification logs. Instead of relying entirely on manual assertion creation, the system autonomously identifies assertion patterns, categorizes them, and generates new assertions, reducing the need for continuous manual intervention while improving verification thoroughness.
2Productivity
If manual assertion creation is used, then assertion quality can be controlled, but time consumption increases
Solution Approach 1:
The system uses copying by replicating successful assertion patterns from verification logs. It identifies patterns of triggered and untriggered assertions across multiple verification cycles and copies these proven patterns to generate new assertions, eliminating the need to manually create each assertion from scratch while maintaining quality standards.
Solution Approach 2:
The system performs preliminary action by pre-processing verification logs to extract and categorize assertion patterns before actual assertion generation. This advance preparation of pattern data enables rapid automatic assertion generation in subsequent verification cycles, significantly reducing the time required for manual assertion creation.
3Measurement precision
If uniform delays are assumed, then verification is simpler, but detection precision of design flaws decreases
Solution Approach 1:
The system applies local quality by analyzing assertion patterns specific to individual blocks and their unique delay characteristics. Instead of assuming uniform delays across the entire SOC, it extracts block-specific timing patterns from verification logs and uses these localized insights to generate more accurate assertions that reflect actual device behavior.
Solution Approach 2:
The system implements parameter changes by transitioning from fixed uniform delay assumptions to dynamic delay parameters derived from actual verification logs. It extracts timing information from real device behavior and uses these empirically-derived parameters to generate assertions that accurately reflect variable delays in different blocks and signal paths.
Data Source
AI summary
Systems and methods for functionally verifying the performance of a system on a chip (SOC) are provided herein. According to some embodiments, the methods may include at least the steps of analyzing a verification log, via a functional verification system, to determine signatures by correlating a pattern of at least one of triggered and untriggered assertions in one or more blocks of a plurality of blocks to behaviors of at least one of the SOC and the one or more blocks of the plurality of blocks. Exemplary methods also include categorizing signatures according to the behaviors, and storing similar signatures based upon the categorization in a database.