External Component Calibration Reuse for Faster SoC Boot
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The calibration of external components, such as external memory, in system-on-chip (SoC) devices is time-consuming, particularly for high-frequency and low-power types like LPDDR4, which can exceed boot time performance metrics in devices like modems and IoT systems.
Innovation Solution
A method where a secondary SoC receives previous calibration parameters from a primary SoC, determines their validity, and operates the external component based on their validity, allowing for reduced boot time by using stored parameters when valid and recalculating when necessary, with mechanisms to ensure parameter integrity through checksums and authentication tags.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external memory is calibrated during boot sequence, then timing parameters are accurately determined for communication between CPU and external memory, but boot time is significantly extended (3-5 seconds for LPDDR4 memory)
Solution Approach 1:
The patent performs calibration of external memory timing parameters before the device is shipped to customers, storing the calibrated values in persistent storage. During device boot, these pre-determined calibration parameters are loaded and applied directly, eliminating the need for time-consuming calibration during the boot sequence while maintaining accurate timing parameters for CPU-external memory communication.
2Loss of time
If calibration parameters are stored and reused from previous operations, then boot time is reduced, but parameter validity and security cannot be guaranteed
Solution Approach 1:
The patent implements a validation mechanism that checks the integrity and validity of stored calibration parameters before reusing them. The system verifies whether the pre-stored calibration parameters are still applicable to the current device configuration and operational conditions, ensuring parameter validity while enabling rapid boot by reuse of cached values when validation succeeds.
3Use of energy by moving object
If external memory operates at high frequency with low power consumption, then power efficiency is improved, but calibration time increases significantly
Solution Approach 1:
The patent performs the time-consuming calibration process for high-frequency low-power external memory operations before device deployment. The calibrated timing parameters are stored and reused during normal operation, allowing the system to benefit from power-efficient high-frequency memory operation without incurring the calibration time penalty during each boot or operational phase.
Data Source
AI summary
Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of calibrating a component. The method includes receiving previous calibration parameters for an external component at a secondary SoC from a primary SoC, wherein the secondary SoC is coupled to the external component and configured to calibrate the external component. The method further includes determining validity of the previous calibration parameters by the secondary SoC. The method further includes operating the external component by the secondary SoC based on the determined validity of the previous calibration parameters.