SoC Boot Control via Single Signal Transition

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Solution Overview

Problem

In spacecraft systems, existing technologies face challenges in efficiently booting up and performing soft resets of processors from serial non-volatile devices to volatile program memory using a single signal, which is crucial for maintaining system integrity and flexibility in radiation environments.

Innovation Solution

The implementation of a method and circuit that utilize a low to high or high to low transition signal to copy program code from serial non-volatile memory to on-chip volatile memory, enabling processor bootup and soft reset without a general reset, and supporting on-demand on-line scrubbing of SRAM, using a SPI interface for efficient code transfer and radiation hardening.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single signal transition is used to trigger processor bootup and soft reset from serial non-volatile memory, then device complexity and pin count are reduced, but the reliability of the boot process in radiation environments may be compromised

Engineering Contradiction:
Improveboot process complexityVSAvoidprocessor boot reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The system performs preliminary actions by pre-positioning the processor in a known initial state and having boot code pre-stored in radiation-hardened non-volatile memory. When the single signal transition occurs, the processor is already prepared to execute the boot sequence from a predetermined location, eliminating the need for complex initialization routines while ensuring reliable startup in radiation environments.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A dedicated boot control signal acts as an intermediary between the external control logic and the processor boot mechanism. This single signal coordinate multiple bootup and reset functions, simplifying the interface while maintaining reliable processor initialization through a centralized control mechanism that can be externally monitored and controlled.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If serial interface is used for code transfer from non-volatile memory to volatile memory, then pin count is reduced, but the speed of code loading decreases

Engineering Contradiction:
Improveinterface complexityVSAvoidcode transfer speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The system transfers only the essential boot code portion from non-volatile memory to volatile memory through the serial interface, rather than transferring the entire program. This partial transfer approach minimizes the total data volume that must be transmitted serially, reducing the impact of serial interface speed limitations while still achieving rapid bootup by loading only the critical initialization routines needed to start the processor.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9367488B1System on a chip (SoC) RHBD structured ASIC
Publication Date: 2016.06.14 MICROELECTRONICS RESEARCH DEVELOPMENT CORP
  • US9367488B1 patent drawing
  • US9367488B1 patent drawing
  • US9367488B1 patent drawing

AI summary

This invention relates to both a method and device for booting up a device and online scrubbing utilizing a system on chip appliqué sensor interface module in a Space Plug-and-Play Avionics environment that incorporates Radiation Hardened by Design components.