SoC Bus Power Gating with Light Bus Switching for Short Idle Periods
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Solution Overview
Problem
In mobile systems on chip (SoCs), the increasing multimedia functions and operation frequency lead to higher leakage power in backbone buses, making it challenging to implement power gating efficiently due to high entry latency, which results in low or impossible power gating entry rates, especially during frequent short idle periods.
Innovation Solution
A power gating method that uses a power management unit (PMU) to transfer control signals to the bus, allowing transactions to be processed by either the main or light bus circuit based on a transaction threshold, reducing power consumption and latency by switching between main and always-on power sources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power gating is applied to the backbone bus to decrease leakage power, then power consumption is reduced, but power gating entry latency increases and power gating entry rate decreases
Solution Approach 1:
The bus is divided into two separate circuits: a main bus circuit for handling high-volume transactions and a light bus circuit for low-volume transactions. This segmentation allows the system to switch between circuits based on transaction volume, enabling faster power gating entry by using the light bus circuit when transactions are light, thus reducing the effective power gating entry latency while still achieving leakage power reduction.
Solution Approach 2:
The system dynamically switches between the main bus circuit and the light bus circuit based on real-time transaction volume monitoring. When transaction volume falls below a threshold, the system transitions to the light bus circuit, which has faster power gating entry characteristics. This dynamic adaptation resolves the contradiction by making the power gating entry latency variable rather than fixed.
2Loss of energy
If power gating is applied to the backbone bus, then leakage power decreases, but power gating entry rate becomes very low or impossible during frequent short idle periods
Solution Approach 1:
By segmenting the bus into main and light circuits, the system can maintain a higher power gating entry rate through the light bus circuit during frequent short idle periods. The light bus circuit is designed with faster power gating characteristics, allowing the system to enter power gating state more frequently without sacrificing overall power savings.
Solution Approach 2:
The light bus circuit acts as an intermediary solution that bridges the gap between power saving requirements and frequent transaction handling. It enables the system to achieve power gating entry during short idle periods by providing an alternative bus path that can quickly transition to low-power state.
3Productivity
If the backbone bus area is increased to improve performance, then multimedia function performance improves, but leakage power increases
Solution Approach 1:
The bus system is segmented into main and light circuits with different area characteristics. The light bus circuit has smaller area and lower leakage power, while the main bus circuit handles high-performance requirements. By dynamically selecting the appropriate circuit based on transaction volume, the system achieves good performance when needed while minimizing leakage power during lower-utilization periods.
Solution Approach 2:
The system changes the operational parameter (which bus circuit is active) based on transaction volume. When transaction volume is high, the main bus circuit with larger area and higher performance is used. When transaction volume is low, the light bus circuit with smaller area and lower leakage power is activated, thus dynamically adjusting the effective bus area in use.
Data Source
AI summary
A power gating method of a system on chip includes transferring a first control signal to a bus by using a power management unit (PMU), transferring a response signal to the PMU by using the bus, in response to the first control signal, moving a transaction to a light bus circuit by using the bus, and transferring a second control signal to a power control circuit by using the PMU to adjust power supplied to the bus, based on the response signal.