SoC Bus Width Conversion with Validity Indicators

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Solution Overview

Problem

In systems on chip (SoCs) and networks on chip (NoCs), data bus width conversions can lead to issues such as generation of invalid data when converting to a narrower bus, resulting in bandwidth wastage, and errors when converting to a wider bus, due to incompatibilities in clock signals and communication protocols among modules.

Innovation Solution

A method involving the generation of validity indicators for each elementary flit, circular permutation of flits when the message size is less than half the output bus width, and storage in buffer memories to ensure only valid data is transmitted, effectively managing bus width conversions by identifying and handling non-valid data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data bus width conversion is implemented without validity indicators, then device complexity is reduced, but data transmission reliability deteriorates due to invalid data being transmitted

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The data bus width conversion process is segmented into distinct stages: segmentation of input data into flits, generation of validity indicators for each flit, and selective transmission based on validity. This segmentation allows the system to track and manage data validity through the conversion process without requiring complex overall validation mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Validity indicators are generated in advance during the flit segmentation phase, before the actual data transmission occurs. This preliminary action ensures that validity information is ready when needed for transmission decisions, eliminating the need for complex runtime validation logic.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If validity indicators are generated and transmitted for each elementary flit, then data transmission reliability is improved, but bandwidth is wasted due to transmission of validity indicator data

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidbandwidth consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The validity indicator is extracted as a separate, minimal overhead element from the main data flit. By taking out only the essential validity information (a single bit per elementary flit) rather than transmitting redundant data, the system achieves reliable data transmission with minimal bandwidth consumption.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The validity indicator provides localized quality information for each individual elementary flit, allowing receivers to process only valid data portions. This local quality marking enables efficient bandwidth utilization by preventing the transmission and processing of invalid data segments.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If circular permutation is applied to flits when message size is less than half output bus width, then manufacturing precision is improved by correct data positioning, but device complexity increases due to permutation logic

Engineering Contradiction:
Improvedata positioning precisionVSAvoidpermutation logic complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The flit permutation mechanism is made dynamic and adaptive based on message size. When the message size is less than half the output bus width, circular permutation is applied; otherwise, standard transmission proceeds. This dynamic approach achieves precise data positioning only when necessary, reducing overall system complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The transmission behavior changes based on the parameter of message size relative to output bus width. By monitoring this parameter and adjusting the transmission strategy (applying circular permutation only when message size < half bus width), the system achieves precise data positioning with minimal additional complexity.

Inventive Principle:
Principle #35Parameter changes

4Adaptability or versatility

If multiple bridges are implemented to interconnect incompatible modules, then adaptability is improved, but silicon surface area increases significantly

Engineering Contradiction:
Improvemodule interconnection adaptabilityVSAvoidsilicon surface area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The network interface module is designed with universal functionality to handle multiple bus width conversions and various communication protocols through a single integrated structure. This multi-functional interface eliminates the need for multiple dedicated bridges, achieving high adaptability while minimizing silicon surface area consumption.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9461913B2Method of data transmission in a system on chip
Publication Date: 2016.10.04 STMICROELECTRONICS (GRENOBLE 2) SAS
  • US9461913B2 patent drawing
  • US9461913B2 patent drawing
  • US9461913B2 patent drawing

AI summary

Embodiments relate to a method for transmitting a message in a data path of a network, the method includes transmitting a message onto an input bus of an input interface module, the message being received in flits of a size corresponding to the width of the input bus and generating a validity indicator for each elementary flit constituting each flit received. The message is transmitted onto an output bus of the input interface module towards a receiving interface module in flits of a size corresponding to the width of the output bus along with each validity indicator generated in association with the corresponding elementary flit. The receiving interface module receives flits constituting the message and the associated validity indicators and rejects a received flit if an elementary flit of the received flit is associated with a validity indicator in the invalid state.