SOC Calibration Circuitry for Multi-Bit Component Identification
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Solution Overview
Problem
Previous information handling systems are limited by ID lines that only provide three bits of information, making it difficult to identify components with increased component density and platform variations, as they require more ID pins, board space, and routing resources, and are unable to account for temperature and aging-related tolerances.
Innovation Solution
The system employs a calibration cycle that eliminates RC tolerances, aging, and temperature variances by using a system-on-a-chip (SOC) to determine the resistance of an identification resistor through inventory and calibration modes, enabling the provision of larger multi-bit information on each ID line, which increases the number of identifiable components and platform variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional three-bit ID lines are used for component identification, then the system structure remains simple, but the number of identifiable components is limited and more ID pins are required for increased component density
Solution Approach 1:
The patent changes the information encoding parameter from 3 bits to multi-bit (up to 10 bits), allowing identification of up to 1024 different components. This is achieved by measuring RC time constants with higher precision and using calibration circuits to eliminate tolerance effects, thereby increasing the information capacity of each ID line without adding more physical pins.
Solution Approach 2:
The patent replaces the mechanical/expansion-based approach (adding more ID pins and board space) with an electronic measurement approach. By substituting physical expansion with electronic calibration and measurement of RC time constants, the system achieves higher component identification capacity without increasing physical footprint or routing complexity.
2Adaptability or versatility
If component density and platform variations are increased, then more ID pins and board space are required, but the traditional three-bit ID lines cannot provide sufficient identification capacity
Solution Approach 1:
The patent increases the information density by changing from 3-bit to multi-bit encoding. Each ID line can now carry up to 10 bits of information, providing identification capacity for 1024 different components. This is achieved through precise measurement of RC time constants and calibration to eliminate tolerance effects, allowing more components to be identified on the same board area.
Solution Approach 2:
The patent transitions from a spatial dimension solution (adding more ID pins and board area) to a temporal/digital dimension solution (measuring time constants and using multi-bit encoding). By measuring the time it takes for capacitor charge/discharge through resistors with different values, the system extracts more information from the same physical resources, effectively adding a temporal measurement dimension to the identification process.
3Reliability
If traditional ID lines are used without calibration, then the system operation is simpler, but temperature and aging-related tolerances cannot be accounted for
Solution Approach 1:
The patent implements preliminary calibration action before normal operation. The calibration circuit measures and stores reference values for RC time constants under known conditions, creating a baseline for later comparisons. This preliminary measurement and storage of calibration data enables the system to compensate for temperature and aging effects during actual component identification, improving reliability without complicating the main identification operation.
Solution Approach 2:
The patent implements feedback through calibration measurements that compare actual RC time constants against reference values. The calibration circuit provides feedback information about tolerance deviations caused by temperature and aging, allowing the system to adjust and compensate for these effects. This feedback mechanism enables accurate component identification despite environmental variations and component degradation over time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for high-resolution multi-bit strapping information, enabling the identification of up to 1024 different components using a single digital I/O pin and capacitor, independent of capacitor tolerance and threshold voltage variations, thus improving component identification accuracy and flexibility.
Implementation Method 1
the SOC may set the identification line to the first digital state for a particular amount of time. In response to an expiration of the particular amount of time, the SOC may detect that a capacitor is substantially discharged
Implementation Method 2
The SOC may determine a resistance of the identification resistor based on the inventory amount of time and the calibration amount of time
Data Source
AI summary
An information handling system includes an identification resistor, calibration circuitry, and a system-on-a-chip (SOC). The SOC sets the calibration line to a first digital state to place the calibration circuitry in an inventory mode. While the calibration circuitry is in the inventory mode, the SOC determines an inventory amount of time to charge the capacitor to a voltage substantially equal to a threshold voltage. The SOC then sets the calibration line to a second digital state to place the calibration circuitry in a calibration mode. While the calibration circuitry is in the calibration mode, the SOC determines a calibration amount of time to charge the capacitor to the voltage substantially equal to the threshold voltage. The SOC determines a resistance of the identification resistor based on the inventory amount of time and the calibration amount of time. The SOC also determines bit strapping information corresponding to the determined resistance.