SoC Clock Duty Ratio Training for Stable Read Margin
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In computing systems, the duty ratio of clock signals exchanged between a System on Chip (SoC) and component devices is affected by temperature and voltage, leading to inaccurate operations and degraded read margins, necessitating an adaptive solution for maintaining an optimum duty ratio.
Innovation Solution
A System on Chip (SoC) with a clock generator, duty ratio determiner, and adjustor that generates and adjusts clock signals based on responses from component devices to determine and optimize the duty ratio for accurate communication, preventing margin degradation and improving system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed duty ratio clock signal is used for communication between SoC and component device, then the system structure is simple, but the read margin is degraded due to temperature and voltage variations
Solution Approach 1:
The clock signal's duty ratio is made dynamic rather than fixed. The system automatically adjusts the duty ratio of the clock signal based on detected timing errors from component device responses, allowing the clock characteristics to adapt to temperature and voltage variations while maintaining reliable communication.
Solution Approach 2:
A feedback mechanism is implemented where the timing of responses from the component device is monitored and used to adjust the clock duty ratio. The system measures the timing of received signals, compares it against expected timing, and uses this feedback to iteratively optimize the clock duty ratio for maximum read margin.
2Reliability
If the clock duty ratio is adjusted to compensate for temperature and voltage effects, then the read margin is improved, but the device complexity increases
Solution Approach 1:
The system performs self-adjustment of the clock duty ratio without requiring external intervention or complex calibration equipment. The SoC automatically monitors the component device responses and adjusts its own clock signal characteristics, making the system self-optimizing and reducing the need for additional external adjustment mechanisms.
Solution Approach 2:
The duty ratio parameter of the clock signal is changed dynamically based on operating conditions. By adjusting this single critical parameter rather than redesigning the entire clock generation system, the solution improves communication accuracy while minimizing the added complexity to just the necessary adjustment circuitry.
3Reliability
If clock training is performed to optimize duty ratio, then the communication reliability is improved, but the initialization time is increased
Solution Approach 1:
The clock training process uses partial action by adjusting the duty ratio in controlled increments rather than exhaustive searching. The system performs adjustments in a limited range around the expected optimal value, achieving sufficient communication reliability without the time cost of exhaustive optimization across all possible duty ratio values.
Solution Approach 2:
The system performs preliminary clock training during initialization to establish an optimal duty ratio before normal operation begins. By completing the time-consuming optimization process beforehand, the system achieves high communication reliability while minimizing the impact on overall system operational time.
Data Source
AI summary
A system on chip includes a clock generator configured to generate a clock signal, and output the clock signal to a component device external to the system on chip. The system on chip further includes a duty ratio determiner configured to determine a component duty ratio, in response to a response that is received from the component device according to the clock signal, and a duty ratio adjustor configured to adjust a current duty ratio of the clock signal to the component duty ratio, and output the clock signal of which the current duty ratio is adjusted, to the component device.