Mixed-Signal SoC Clock Tuning for ADC-Scanner Timing Closure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Timing closure in mixed signal circuits, particularly in CMOS sensor imagers, is challenging due to the difficulty in accurately simulating analog components before fabrication, leading to costly, time-consuming, and inefficient techniques that often overcompensate or undercompensate for timing lags.
Innovation Solution
A system that includes a monitoring component to track performance metrics of a horizontal scanner and an ADC, and an optimization component to dynamically adjust clock parameters such as period, frequency, and phase shift in real-time, enabling independent tuning of clocks for optimized mixed signal circuit performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional timing closure techniques are used for mixed signal circuits, then timing requirements can be addressed, but the process becomes costly, time-consuming, and inaccurate due to inability to simulate analog components
Solution Approach 1:
The patent changes the approach from attempting to simulate analog components to measuring actual timing parameters post-fabrication and adjusting clock parameters accordingly. This involves measuring propagation delays and timing skew in the actual hardware, then using feedback control to adjust clock frequencies and phases to achieve timing closure, thereby improving accuracy without extending time significantly.
Solution Approach 2:
The patent implements a feedback control system where timing performance is monitored after fabrication, and clock parameters are adjusted based on measured timing skew and propagation delays. This closed-loop approach allows accurate timing closure by continuously measuring actual performance and making corrective adjustments, eliminating the need for time-consuming pre-fabrication simulation of analog components.
2Reliability
If conventional timing closure techniques are used for mixed signal circuits, then timing requirements can be addressed, but the process becomes costly and complex
Solution Approach 1:
The patent enables the mixed signal circuit to self-adjust its timing parameters through automated feedback control. The system measures its own timing skew and propagation delays, then automatically adjusts clock parameters without requiring complex external timing closure processes. This self-service approach reduces both cost and complexity while maintaining reliable timing requirement satisfaction.
Solution Approach 2:
The patent introduces dynamic adjustment of clock parameters (frequency, phase) based on measured timing conditions. Rather than using static timing closure methods that require complex manual intervention, the system dynamically adapts clock parameters post-fabrication based on actual measured performance, simplifying the overall process while ensuring reliable timing.
3Measurement precision
If conventional timing closure techniques are used for mixed signal circuits, then timing can be addressed, but the techniques often overcompensate or undercompensate for timing lags
Solution Approach 1:
The patent uses feedback control to measure actual timing lags post-fabrication and adjust clock parameters accordingly. This eliminates overcompensation or undercompensation by basing adjustments on actual measured values rather than estimates or conservative margins. The system continuously monitors timing performance and makes precise corrective adjustments, improving both accuracy and ease of manufacture.
Solution Approach 2:
The patent performs preliminary measurement of timing parameters during or after fabrication, allowing accurate determination of actual timing lags before final operation. This preliminary characterization enables precise compensation without over- or under-correction, simplifying the manufacturing process while improving timing accuracy.
4Productivity
If independent clock tuning is implemented, then timing performance can be optimized, but system complexity increases
Solution Approach 1:
The patent uses feedback control to automatically manage the complexity of independent clock tuning. The system measures timing skew between different clock domains and automatically adjusts clock parameters to optimize performance. This automated feedback mechanism handles the control complexity, allowing independent clock tuning to improve productivity without requiring manual management of the increased system complexity.
Solution Approach 2:
The patent introduces a clock management component that acts as an intermediary between the independent clock sources and the rest of the system. This intermediary monitors timing relationships and coordinates adjustments across different clock domains, managing the complexity of independent tuning while enabling performance optimization. The intermediary abstracts the complexity from the overall system design.
Data Source
AI summary
The claimed subject matter provides systems and/or methods that facilitate controlling timing dependencies in a mixed signal circuit. Timing performance associated with a horizontal scanner and an analog to digital converter (ADC) can be monitored. Moreover, data related to the monitored timing performance can be leveraged to modify timing parameter(s) of clocks that coordinate operations of the horizontal scanner and the ADC (e.g., and/or digital component(s) included in the mixed signal circuit). For example, the clocks associated with the horizontal scanner and the ADC can be independently tuned to optimize mixed signal circuit performance.