SoC Clock Management Unit Handshake Power Control
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Solution Overview
Problem
As the integration density, size, and operation speed of System-on-Chip (SoC) increase, power consumption becomes a significant design factor, leading to potential overheating and malfunction or damage, necessitating effective power management techniques.
Innovation Solution
The implementation of a clock management unit (CMU) with a full handshake method for clock gating, which selectively provides or stops clock signals to intellectual property (IP) blocks based on request signals, reducing power consumption by putting unused blocks into sleep mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If clock gating is implemented to reduce power consumption, then power consumption decreases, but device complexity increases due to the need for additional control circuits and handshake protocols
Solution Approach 1:
A channel management circuit is introduced as an intermediary component between the IP blocks and the clock control circuit. This mediator handles the request signal forwarding and coordination, simplifying the overall control architecture while enabling effective clock gating. The channel management circuit acts as a buffer that manages the complexity of multiple IP block clock control requirements.
2Reliability
If full handshake method is used for clock management, then reliability of clock control improves, but operation speed decreases due to additional signal exchange steps
Solution Approach 1:
The patent implements a partial handshake mechanism where only the essential handshake signals are exchanged between the channel management circuit and IP blocks. This selective approach to full handshake protocol maintains sufficient reliability for clock control while minimizing the overhead of complete handshake procedures, thereby improving operational speed.
Data Source
AI summary
A system on chip (SoC) includes a plurality of intellectual property (IP) blocks and a clock management unit (CMU) configured to perform clock gating on at least one of the IP blocks. The IP blocks and the CMU interface with one another using a full handshake method. The full handshake method may include at least one of the IP blocks sending a request signal to the CMU to begin providing a clock signal or to stop providing the clock signal, and the CMU sending an acknowledgement signal to the corresponding IP block in response to receipt of the request signal.