SoC Debug Access Protection Using Tamper Detection Circuits

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Solution Overview

Problem

Existing systems-on-chip (SOC) are vulnerable to reverse engineering attacks through hardware manipulation of debug command signals, allowing unauthorized access to sensitive information during different stages of software development.

Innovation Solution

A tamper circuit is integrated into the SOC to detect and respond to illegitimate changes in debug command signals, activating protective measures such as system shutdown or data deletion to guard against unauthorized access, ensuring secure access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If debug command signals are allowed to control access permissions during software development, then debugging functionality and system accessibility are improved, but vulnerability to hardware manipulation attacks increases

Engineering Contradiction:
Improvedebugging accessibilityVSAvoidhardware manipulation vulnerability
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

A tamper detection circuit is introduced as an intermediary between the debug command signals and the access control logic. This circuit monitors the debug command signals for signs of hardware manipulation (such as laser fault injection) and blocks illegitimate access attempts, thereby maintaining debugging functionality while preventing hardware manipulation attacks

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary detection of potential tamper conditions on debug command signals before granting access permissions. By detecting manipulation attempts in advance and preventing execution of compromised commands, the system counteracts potential attacks before they can compromise secure data

Inventive Principle:
Principle #9Preliminary anti-action

2Reliability

If access to debugging functionality is restricted to prevent attacks, then system security is improved, but debugging capability during development phases deteriorates

Engineering Contradiction:
Improvesystem securityVSAvoiddebugging capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The access control mechanism dynamically adjusts permissions based on the detected integrity of debug command signals. When no tamper is detected, full debugging access is permitted for development productivity; when tamper is detected, access is restricted to prevent attacks, thus adapting security levels to current threat conditions

Inventive Principle:
Principle #15Dynamics

3Object-affected harmful factors

If tamper detection is implemented on debug command signals, then protection against hardware attacks is improved, but system complexity increases

Engineering Contradiction:
Improvehardware attack protectionVSAvoidcircuit complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The tamper detection functionality is extracted as a separate, dedicated circuit module that independently monitors debug command signals. This modular approach allows the detection logic to be implemented with minimal additional complexity while providing comprehensive protection against hardware manipulation attacks

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20250370911A1System-on-chip including a processor having debugging functionality and a tamper circuit, and corresponding tamper protection method
Publication Date: 2025.12.04 STMICROELECTRONICS INT NV
  • US20250370911A1 patent drawing
  • US20250370911A1 patent drawing

AI summary

A system-on-chip includes a processor having program debugging functionality. Debug parameters are determined by debug command signals. A tamper circuit detect states on said debug command signals which represent debug access permission.