SoC IP Block Activation via Default Slave Routing

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Solution Overview

Problem

System-on-a-chip (SoC) designs face challenges in efficiently managing and activating multiple Intellectual Property (IP) blocks across different power domains, leading to issues with power consumption, reliability, and assembly costs, particularly in handling call signals and determining the activation state of slave IP blocks.

Innovation Solution

The implementation of a bus system connected to both master and slave IP blocks, along with a default slave IP block, utilizing a power and clock control part to generate control signals for activating or inactivating IP blocks and a default checking unit to determine the activation state of slave IP blocks, ensuring that call signals are transferred to either the active or default slave IP block based on control signals and decoded address information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If multiple IP blocks are integrated across different power domains to reduce power consumption and assembly costs, then power efficiency and cost are improved, but the complexity of managing activation states and routing call signals increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcomplexity of managing activation states
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

A default slave IP block is introduced as an intermediary component that receives and processes call signals when the primary slave IP block is inactive. This mediator approach allows the system to maintain simplified signal routing logic while enabling dynamic power management across multiple IP blocks in different power domains.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements dynamic activation and deactivation of slave IP blocks based on operational requirements. Control signals dynamically switch between active and inactive states, allowing the system to adapt its power consumption profile while maintaining functional responsiveness through the default slave IP block mechanism.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If slave IP blocks are dynamically activated or inactivated to reduce power consumption, then energy efficiency is improved, but the reliability of signal routing and system response becomes more difficult to ensure

Engineering Contradiction:
Improvepower consumptionVSAvoidreliability of signal routing
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The default slave IP block serves as a pre-prepared backup or cushion that is always ready to receive call signals when the primary slave IP block is inactive. This prior cushioning mechanism ensures that no call signals are lost during power state transitions, maintaining system reliability while enabling dynamic power management.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The system monitors the activation state of slave IP blocks and dynamically routes call signals based on this feedback information. When a slave IP block transitions to an inactive state, the control logic receives feedback and automatically redirects subsequent call signals to the default slave IP block, ensuring continuous reliable operation.

Inventive Principle:
Principle #23Feedback

3Reliability

If a default slave IP block is added to handle call signals when the primary slave is inactive, then system reliability is improved, but device complexity and assembly cost increase

Engineering Contradiction:
Improvereliability of call signal handlingVSAvoidnumber of IP blocks
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The default slave IP block is designed with multi-functionality, serving as both a functional processing unit and a backup receiver for call signals. This universal design allows a single additional component to provide both operational capacity and reliability assurance, minimizing the increase in device complexity while maximizing the benefit to system reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9047419B2System on chip and operating method thereof
Publication Date: 2015.06.02 SAMSUNG ELECTRONICS CO LTD
  • US9047419B2 patent drawing
  • US9047419B2 patent drawing
  • US9047419B2 patent drawing

AI summary

A system on chip comprises a bus electrically connected with a master intellectual property (IP) block, a slave IP block, and a default slave IP block. An IP block control part is configured to generate a control signal for activating or inactivating the slave IP block. When a call signal on the slave IP block is received from the master IP block, the bus is configured to transfer the received call signal to either one of the slave IP block and the default slave IP block according to the received call signal and the control signal.