SoC Automatic Design Device Signal Code Classification
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Solution Overview
Problem
As the number of hardware modules integrated on a system-on-chip (SoC) increases, managing various communication and signals between them becomes complex, and errors in connecting these modules can lead to inoperability or malfunction, necessitating a method for correct and automated connection.
Innovation Solution
A system-on-chip automatic design device that generates and classifies signal codes based on type information, using synthesizers to create communication architectures for transmitting signals, thereby automatically connecting Intellectual Property (IP) blocks through a network-on-chip or other communication units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of hardware modules integrated on a system-on-chip increases, then the functionality and performance of the system-on-chip is improved, but the complexity of managing various communication and signals between the hardware modules increases
Solution Approach 1:
The patent introduces an automatic connection device as an intermediary tool that manages the complex signal connections between increasing numbers of IP blocks. This device automatically generates connection codes, classifies signals, and synthesizes communication architectures, thereby reducing the manual burden and complexity of managing communications as hardware modules increase.
Solution Approach 2:
The automatic connection device enables the system to self-configure connections by automatically generating connection codes based on IP block information, classifying signals by type, and synthesizing appropriate communication architectures without requiring manual intervention for each connection as the system scales.
2Adaptability or versatility
If manual connection methods are used for IP blocks, then flexibility in design is maintained, but the risk of mistakes and errors causing inoperability or malfunction increases
Solution Approach 1:
The automatic connection device incorporates feedback mechanisms by automatically verifying signal classifications and connection code generation. The device processes IP block information, generates connection codes, and synthesizes communication architectures in a controlled feedback loop that reduces human error while maintaining design flexibility through programmable parameters.
Solution Approach 2:
The automatic connection device acts as an intermediary between manual design intent and actual connection implementation, translating designer specifications into verified connection codes and communication architectures, thereby eliminating manual connection errors while preserving design flexibility.
3Productivity
If automated connection methods are implemented, then design speed and accuracy are improved, but the complexity of the design tool increases
Solution Approach 1:
The automatic connection device is segmented into distinct functional modules: an information processing unit that generates connection codes from IP block data, a signal classification unit that categorizes signals by type, and a synthesis unit that creates communication architectures. This segmentation manages tool complexity by organizing functions into separate, manageable components while maintaining high design speed and accuracy.
4Measurement precision
If multiple types of signals and communications are managed manually, then detailed control is possible, but the burden of management increases significantly
Solution Approach 1:
The automatic connection device performs self-service by automatically classifying signals into types (e.g., clock signals, data signals, control signals) and generating appropriate connection codes without requiring manual categorization. This maintains precise control over signal management while eliminating the significant burden of manual management as the number of signal types increases.
Data Source
AI summary
Disclosed is a method of operating a system-on-chip automatic design device. The system-on-chip automatic design device includes a first synthesizer and a second synthesizer. The method includes generating a first code, based on information of a first signal and information of a second signal that are used in a first IP (Intellectual Property) block, classifying a first signal code corresponding to the first signal and a second signal code corresponding to the second signal from the first code, synthesizing, through the first synthesizer, a first communication architecture configured to transmit the first signal, based on the classified first signal code, and synthesizing, through the second synthesizer, a second communication architecture configured to transmit the second signal based on the classified second signal code.