SoC Automatic Detection Circuit With Virtual Host and I/O Switching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing complexity of system-on-chip (SoC) integrated circuits leads to longer verification times and higher costs due to the need for extensive verification equipment and programs, and issues with ICs often go undetected until after mass production and shipment, requiring costly re-testing.

Innovation Solution

An automatic detection circuit and method for ICs that includes a first and second dynamic switching circuit, a virtual host circuit, a virtual I/O circuit, a detection vector unit, and a control unit, which allows for automatic detection by switching control from the processor to a virtual host and I/O circuit, generating detection vectors, and comparing signals with predetermined data to generate detection results.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If verification equipment and programs are increased to handle SoC complexity, then detection capability is improved, but verification time and costs increase

Engineering Contradiction:
Improvedetection capabilityVSAvoidverification time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements a built-in self-test mechanism where the SoC uses its own internal resources (processor, memory interfaces, IP circuits) to perform automatic detection. The system configures itself through detection vectors that automatically route test signals through the circuit's own components, eliminating the need for extensive external verification equipment and reducing verification time while maintaining comprehensive detection capability.

Inventive Principle:
Principle #25Self-service

2Productivity

If built-in self-test is implemented, then detection speed is improved, but device complexity increases

Engineering Contradiction:
Improvedetection speedVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent makes existing SoC components multi-functional by enabling the processor, memory interfaces, and IP circuits to serve both their primary functions and self-test functions. The dynamic switching circuit and virtual host circuit allow these components to be reused for detection purposes, achieving fast built-in self-test without adding significant structural complexity to the original design.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Extent of automation

If dynamic switching circuits are added for automatic detection, then automation level is improved, but device complexity increases

Engineering Contradiction:
Improveautomation levelVSAvoidcircuit complexity
Core Design Contradiction:
Extent of automationVSDevice complexity

Solution Approach 1:

The patent incorporates the dynamic switching circuit and virtual host circuit into the SoC design from the beginning, configuring them in advance to work with the processor and other components. This preliminary integration allows the system to automatically switch between normal operation and self-test modes without requiring complex runtime decision-making, thereby achieving high automation while controlling complexity through pre-established pathways.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11474148B2Automatic detection circuit for integrated circuit and automatic detection method for the same
Publication Date: 2022.10.18 REALTEK SEMICON CORP
  • US11474148B2 patent drawing
  • US11474148B2 patent drawing

AI summary

An automatic detection circuit for an integrated circuit and an automatic detection method for the same are provided. The automatic detection circuit is suitable for a system-on-chip (SoC). A control unit of the automatic detection circuit enters an automatic detection mode to: switch a first dynamic switching circuit to connect a main bus to a virtual host circuit; switch a second dynamic switching circuit to connect memory interfaces and intellectual property circuit to a virtual input and output circuit; send detection vectors to the virtual host circuit to set and activate the memory interfaces and the intellectual property circuits; send the detection vectors to the virtual I/O circuit to replace external memory and external equipment for sending and receiving signals; and compare signals received by the virtual host circuit or signals received by the virtual input and output circuit with predetermined signal data to generate a detection result.