SoC DVFS Frequency Selection for Minimum Energy Use
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current system-on-chip (SoC) technologies face challenges in optimizing power consumption, particularly in mobile devices, where dynamic voltage and frequency scaling (DVFS) is needed to minimize energy usage while maintaining performance.
Innovation Solution
The implementation of a DVFS method within the SoC that includes a processor with a DVFS module and a clock management unit, which calculates and adjusts the operating frequency to achieve minimum energy consumption based on required performance, considering factors like workload execution time, operating voltage, and temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the operating frequency of the processor is increased to improve performance, then the processing speed increases, but the energy consumption increases
Solution Approach 1:
The patent implements dynamic frequency adjustment by allowing the processor to change its operating frequency based on real-time workload conditions. The system monitors performance requirements and dynamically scales the frequency up or down, making the frequency a dynamic parameter rather than a fixed value, thereby optimizing the trade-off between speed and energy consumption.
Solution Approach 2:
The patent changes the operating frequency parameter of the processor based on calculated energy consumption models. By adjusting this key parameter according to workload characteristics and performance requirements, the system achieves optimal energy efficiency while maintaining necessary processing speed.
2Use of energy by moving object
If the operating frequency is reduced to minimize energy consumption, then the energy consumption decreases, but the processing performance deteriorates
Solution Approach 1:
The patent employs a feedback mechanism where the system continuously monitors performance requirements and energy consumption, then adjusts the operating frequency accordingly. This closed-loop control ensures that frequency is reduced only when performance requirements are met at lower frequencies, preventing performance deterioration while achieving energy savings.
Solution Approach 2:
The patent calculates and determines the optimal frequency in advance based on predicted workload characteristics and performance requirements. By performing this optimization before actual execution, the system can switch to the pre-determined optimal frequency, ensuring both energy efficiency and performance requirements are met from the start.
3Use of energy by moving object
If dynamic voltage and frequency scaling is implemented to optimize power consumption, then energy efficiency improves, but system complexity increases
Solution Approach 1:
The patent integrates the DVFS control logic and energy consumption calculation functions into the existing processor architecture. By merging these power management functions with the processor's control units and existing performance monitoring mechanisms, the system achieves energy optimization without adding significant external complexity.
Data Source
AI summary
An operating method of a system-on-chip (SoC) which includes a processor including a first core and a dynamic voltage and frequency scaling (DVFS) module and a clock management unit (CMU) for supplying an operating clock to the first core, the operating method including: obtaining a required performance of the first core; finding available frequencies meeting the required performance; obtaining information for calculating energy consumption for each of the available frequencies; calculating the energy consumption for each of the available frequencies, based on the information; determining a frequency, which causes minimum energy consumption, from among the available frequencies as an optimal frequency; andadjusting an operating frequency to be supplied to the first core to the optimal frequency.