System-on-Chip Fatal Error Identification via CPLD Port Mapping
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Solution Overview
Problem
System-on-chip products do not support Baseboard Management Controller (BMC), preventing them from sensing fatal errors out-of-band and limiting user supervision and problem resolution.
Innovation Solution
A method that sets a port value of a processor to a preset value corresponding to a fatal error, converting it into register data accessible to an external server, allowing identification and recording of errors using a complex programmable logic device and error status registers, even without BMC support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If system-on-chip products do not support Baseboard Management Controller, then device complexity is reduced, but error detection and supervision capability is lost
Solution Approach 1:
The patent introduces a complex programmable logic device as an intermediary component that bridges the gap between the system-on-chip product and external error detection. This CPLD device monitors error status registers and outputs error information through general-purpose input/output ports, enabling error detection without requiring BMC support while maintaining system simplicity
Solution Approach 2:
The system-on-chip product performs self-error-detection by having its internal error status registers automatically set by the processor when fatal errors occur. The error information is then made accessible through the CPLD interface without requiring external BMC intervention, allowing the system to serve its own error monitoring needs
2Device complexity
If out-of-band error sensing is not implemented, then device complexity is reduced, but reliability of error supervision is worsened
Solution Approach 1:
The patent implements preliminary error detection by having the processor set error status register bits immediately when fatal errors occur, before the system needs to report or respond to these errors. This preliminary action ensures error information is captured and preserved in the error status register, enabling reliable post-event analysis even without continuous BMC monitoring
3Device complexity
If error status registers are not preserved after restart, then device complexity is reduced, but loss of error information increases
Solution Approach 1:
The patent implements error information preservation by copying the contents of error status registers to a separate storage location or maintaining them across system restarts. The CPLD device reads and stores error status information, ensuring that error records are not lost when the system-on-chip product restarts, while avoiding the complexity of implementing full BMC functionality
Data Source
AI summary
The present disclosure provides a method for providing a fatal error of a system-on-chip product and a method for identifying a fatal error of a system-on-chip product. The system-on-chip product includes a processor. The method for providing a fatal error of a system-on-chip product includes: when a fatal error occurs, setting a port value of a preset port of the processor as a preset value corresponding to the fatal error; converting the preset value into register data accessible to an external server, such that the external server can identify the fatal error that occurs in the system-on-chip product according to the preset value when acquiring the register data. Through the present disclosure, even if the system-on-chip product does not support a baseboard management controller, the user of the baseboard can still obtain the reason for the error of the product through an out-of-band method.