Concurrent Fault Simulation Debugging for SoC Safety Verification
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Solution Overview
Problem
Safety engineers face challenges in tracing the propagation path of injected faults in system-on-a-chip (SoC) designs due to the lack of mechanisms in existing debug environments, leading to time-consuming debugging processes when faults are not detected at functional or checker outputs.
Innovation Solution
A computer-implemented method for debugging in fault simulation that includes performing concurrent fault simulation, identifying signals of interest in the fault propagation path, generating faulty and good databases, and determining differences between them to trace the fault path efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If concurrent fault simulation is performed on the entire SoC to trace fault propagation paths, then fault detection capability is improved, but debugging time and computational resources increase significantly
Solution Approach 1:
The patent segments the SoC debugging process by identifying and isolating only the relevant signals and circuit paths that are part of the fault propagation path. Instead of analyzing the entire SoC, the system divides the debug database into manageable segments focused on specific functional units and signal traces, thereby reducing computational overhead while maintaining fault detection capability.
Solution Approach 2:
The patent extracts only the necessary information from the full SoC debug database by identifying signals of interest that are part of the fault propagation path. The system takes out and focuses analysis on specific signal traces, register values, and circuit behaviors that are directly relevant to the injected fault, eliminating unnecessary data processing and reducing debugging time.
2Loss of information
If debug databases include all signals in the SoC to ensure complete fault analysis, then measurement completeness is improved, but database size and processing complexity increase
Solution Approach 1:
The patent applies local quality by assigning different levels of detail and analysis depth to different parts of the debug database based on their relevance to the fault propagation path. Critical signals on the fault path receive detailed analysis and are included in the debug database with full trace information, while unrelated signals are excluded or summarized, optimizing the balance between completeness and manageability.
Solution Approach 2:
The system extracts and retains only the essential debug information related to fault propagation, such as signal values at critical nodes, register states, and control flow information. By taking out unnecessary data from the complete SoC debug database, the system reduces database size and processing complexity while preserving all information needed for effective fault analysis.
3Reliability
If the entire SoC is debugged to ensure no bugs are missed, then reliability verification is improved, but productivity and debugging efficiency decrease
Solution Approach 1:
The patent applies preliminary action by pre-identifying the fault propagation path and signals of interest before performing detailed debug analysis. The system prepares a focused debug database containing only relevant information in advance, which accelerates the actual debugging process while ensuring that safety-critical paths are thoroughly verified. This preliminary preparation maintains reliability verification without sacrificing productivity.
Data Source
AI summary
The present disclosure relates to a system and method for debugging in fault simulation associated with an electronic design. Embodiments may include receiving, using at least one processor, an electronic design and performing concurrent fault simulation on a fault to be analyzed associated with the electronic circuit design, wherein the fault has a fault propagation path associated therewith. Embodiments may also include identifying a trace of one or more signals of interest that are in the fault propagation path and generating a faulty database and a good database associated with the one or more signals of interest that are in the fault propagation path. Embodiments may further include identifying one or more differences between the faulty database and the good database.