SoC Inter-Core Communication via MAC and Isolated Address Spaces
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Solution Overview
Problem
Existing inter-core communication methods in multi-core processors face challenges in ensuring security, stability, and flexibility due to shared memory dependencies and inflexible internal bus communication, particularly when handling large data amounts.
Innovation Solution
Implementing inter-core communication using independent address spaces and a media access controller (MAC) to transmit data between processing cores, allowing parallel communication through multiple channels, ensuring secure and stable data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If shared memory is used for inter-core communication, then communication simplicity is improved, but security and stability deteriorate due to inability to ensure independence of virtual machine resources
Solution Approach 1:
The patent divides the memory address space into separate first and second address spaces that are independently accessible by different processing cores. This segmentation prevents cores from directly accessing each other's memory space, ensuring resource independence and security while maintaining communication capability through controlled access paths.
2Adaptability or versatility
If internal bus is used for inter-core communication, then communication flexibility is improved, but data transfer efficiency deteriorates when handling large amounts of data
Solution Approach 1:
The patent introduces a media access controller as an intermediary component between processing cores and memory address spaces. This mediator enables efficient data transfer by providing dedicated access paths and controlling the flow of data between cores and memory, improving transfer efficiency for large data amounts while maintaining the flexibility of the internal bus architecture.
3Reliability
If independent address spaces are used for inter-core communication, then security and stability are improved, but device complexity increases due to additional address space management
Solution Approach 1:
The patent designs the media access controller to perform multiple functions: it manages access to independent address spaces, controls data transfer between cores, and handles communication protocols. This multi-functionality reduces the need for separate management mechanisms for each function, thereby limiting the increase in overall system complexity while maintaining security and stability benefits.
Data Source
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Figure 1B
Figure 1C~2
AI summary
This disclosure provides an inter-core communication method and apparatus for a system-on-chip, a storage medium, and an electronic device. The inter-core communication method for a system-on-chip includes: generating a communication request for inter-core communication between a first processing core and a second processing core; determining a target media access controller based on the communication request; reading inter-core communication data from a first address space corresponding to the first processing core based on the communication request and the target media access controller; and transmitting the inter-core communication data to a second address space corresponding to the second processing core based on the target media access controller. The first address space and the second address space correspond to different address spaces in a memory, so that address spaces accessed by the first processing core and the second processing core are independent of each other, which can improve security and stability of communication. Moreover, parallel communication can be performed by using a plurality of channels of a media access controller, so that inter-core communication with a large amount of data can be implemented, thereby improving high efficiency and flexibility of the inter-core communication.