Programmable Transaction Generator for SOC Interface Testing
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Solution Overview
Problem
The complexity of system on a chip (SOC) interconnects makes it difficult to evaluate the performance of interface circuits, as they are often inaccessible and lack the capability to generate adequate test stimuli, hindering the evaluation of interface circuits and the detection of defects or design revisions.
Innovation Solution
A programmable hardware transaction generator circuit is integrated into the interface circuit to simulate interactions between local functional circuits and independent networks, enabling the generation of test transactions that mimic real-world interactions, even when the local functional circuits lack the necessary capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of processors and components on SOC is increased, then performance is improved, but interconnect complexity increases making evaluation difficult
Solution Approach 1:
A transaction generator is introduced as an intermediary component within the interface circuit. This generator creates test transactions that mimic real-world interactions between local functional circuits and the global communication fabric, enabling evaluation of the interface circuit without requiring access to or modification of the complex interconnect structure itself.
Solution Approach 2:
The interface circuit performs self-evaluation by incorporating a transaction generator that autonomously produces test transactions. The interface circuit tests itself by processing these generated transactions through its internal logic, eliminating the need for external testing equipment or complex interconnect modifications.
2Device complexity
If interface circuits are made inaccessible to simplify structure, then device complexity is reduced, but testing capability is lost
Solution Approach 1:
The interface circuit incorporates a transaction generator that enables it to test itself autonomously. The generator is integrated within the interface circuit's internal logic, allowing the circuit to evaluate its own functionality by processing self-generated test transactions without requiring external access or modification.
Solution Approach 2:
The transaction generator is merged with the interface circuit, combining the testing functionality directly within the circuit being tested. This integration allows the interface circuit to maintain its simplified structure while simultaneously possessing self-testing capabilities, as the generator and interface circuit form a unified component.
3Device complexity
If local functional circuits lack test generation capability, then device complexity is reduced, but adequate test stimuli cannot be generated
Solution Approach 1:
A transaction generator acts as an intermediary that compensates for the local functional circuit's lack of test generation capability. The generator creates appropriate test transactions that mimic real-world interactions, providing adequate test stimuli without requiring the local functional circuit itself to have complex test generation logic.
Solution Approach 2:
Instead of adding test generation capability to the local functional circuit (horizontal expansion), the solution moves to another dimension by placing the transaction generator in the interface circuit layer. This vertical separation allows simple local circuits to be tested by a more capable generator in a different architectural layer.
Data Source
AI summary
In an embodiment, an SOC includes a global communication fabric that includes multiple independent networks having different communication and coherency protocols, and a plurality of input-output (I/O) clusters that includes different sets of local functional circuits. A given I/O cluster may be coupled to one or more of the independent networks and may include a particular set of local functional circuits, a local fabric coupled to the particular set of local functional circuits, and an interface circuit coupled to the local fabric and configured to bridge transactions between the particular set of local functional circuits and the global communication fabric. The interface circuit may include a programmable hardware transaction generator circuit configured to generate a set of test transactions that simulate interactions between the particular set of local functional circuits and a particular one of the one or more independent networks.