SoC IO Pad Feedback Latching for Reliable Wakeup Transitions
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Solution Overview
Problem
Conventional System-on-Chip (SoC) integrated circuits experience wakeup failures due to incorrect latching of input/output (IO) pad controls during standby mode transitions, particularly exacerbated by process, voltage, and temperature variations, leading to persistent standby mode and potential endless loop issues.
Innovation Solution
Implementing closed loop feedback mechanisms within the SoC integrated circuits, utilizing a latch acknowledge generation cell to ensure that input buffer enable signals are latched before reset, thereby synchronizing IO pad configurations with the core circuitry to prevent incorrect latching during standby mode entry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional SoC integrated circuits switch off low voltage supply of IO pads and reset control logic during standby entry, then power saving is achieved, but IO pad controls become latched in incorrect states causing wakeup failures
Solution Approach 1:
The patent applies preliminary action by asserting the latch enable signal before switching off the low voltage supply and resetting the control logic. This ensures that IO pad controls are properly latched in their current state before the power transition occurs, preventing incorrect latching and wakeup failures while maintaining power savings.
Solution Approach 2:
The patent implements feedback by monitoring the latching status of IO pad controls and using this information to control the timing of power supply switching and reset operations. The system waits for confirmation that latching is complete before proceeding with power transition, ensuring reliability while achieving power savings.
2Loss of energy
If the control logic is reset followed by supply shut off during standby entry, then power saving is achieved, but IO pad controls are latched in incorrect states
Solution Approach 1:
The patent reverses the conventional sequence by performing the latching action (asserting latch enable) before the reset and power shut-off operations. This preliminary latching ensures that even with timing variations in manufacturing, the IO pad controls are securely latched before the critical power transition occurs, achieving both power savings and timing precision.
3Speed
If IO pads are used as wakeup source during standby mode, then system responsiveness is improved, but wakeup failures occur due to incorrect latching
Solution Approach 1:
The patent ensures that IO pad controls are latched in their correct operational state before entering standby mode. This preliminary latching action guarantees that when IO pads are used as wakeup sources, they will correctly detect and transmit wakeup signals without failure, maintaining both fast response and high reliability.
4Loss of energy
If the SoC integrated circuit enters standby mode with asynchronous reset, then power saving is achieved, but susceptibility to wakeup failures increases due to PVT variations and IORING size
Solution Approach 1:
The patent uses feedback mechanisms to monitor the actual latching status of IO pad controls and adjusts the timing of power transition accordingly. This feedback approach compensates for PVT variations and IORING size effects, ensuring reliable latching under all operating conditions while maintaining power savings during standby mode.
Data Source
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AI summary
System-on-Chip (SoC) integrated circuits, methods of operating such circuits, and methods and systems for avoiding wakeup failures relating to such circuits are disclosed herein. In one example embodiment, the present disclosure relates to a SoC integrated circuit that includes core circuitry including one or more control components, and peripheral input/output (IO) circuitry including an input circuit portion, a plurality of IO pads, and a feedback generation cell, which is configured to send at least one feedback signal to be received by the one or more control components in response to a first one of one or more intermediate signals sent by the input circuit portion. The one or more control components is/are configured to send, after the one or more control components have received the at least one feedback signal, one or more input buffer enable signals to be received by the IO pads to avoid a wakeup failure.