SoC Power Management via Isolated Real-Time Counter
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Solution Overview
Problem
System on chip devices face rapid power drainage and data loss issues due to continuous operation during wireless monitoring, leading to frequent battery replenishment and potential data loss when the power source is exhausted.
Innovation Solution
Implementing a real-time counter module isolated from the rest of the hardware using voltage level shifting cells and voltage island cells, allowing for tiered states of operation, including sleep mode, to reduce power consumption by isolating unused components and generating control signals for external devices, with a clock generator that reduces bias current and a keep-alive memory for storing data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the system on chip operates continuously to monitor external devices, then data monitoring reliability is improved, but power consumption increases significantly
Solution Approach 1:
The system is divided into two independent power domains: a low-power real-time counter module that remains operational and a high-power main hardware module that enters sleep mode. This segmentation allows the system to maintain monitoring capability through the isolated RTC module while significantly reducing overall power consumption by disabling the main module.
Solution Approach 2:
A voltage island cell acts as an intermediary between the real-time counter module and the rest of the hardware module, enabling electrical isolation and independent power supply. This intermediary structure allows the RTC module to operate independently at low power while the main module can be powered down without affecting data integrity.
2Use of energy by moving object
If the system on chip enters sleep mode to reduce power consumption, then power consumption is reduced, but data loss risk increases
Solution Approach 1:
The real-time counter module is extracted from the main hardware module and isolated using voltage island cells. This extraction allows the critical timing and counter functions to continue operating independently in low-power mode, while the main module can be completely powered down without risking data loss, as the extracted module maintains its own power supply.
3Adaptability or versatility
If voltage level shifting cells and voltage island cells are added to isolate the real-time counter module, then power management flexibility is improved, but device complexity increases
Solution Approach 1:
Voltage island cells serve as intermediaries that provide both electrical isolation and power management functionality. By incorporating the isolation function directly into the voltage island cells, the design avoids adding separate isolation circuits, thereby minimizing the increase in device complexity while achieving the desired power management flexibility.
Data Source
AI summary
Optimum power management of system on chip based on tiered states of operation is disclosed. In one embodiment, a system on chip includes a hardware module including one or more of a microcontroller, a microprocessor, a DSP core, a memory, a timing source, a peripheral, and an external interface to have a real time counter module of the peripheral isolated from a rest of the hardware module using a plurality of voltage level shifting cells and/or a plurality of voltage island cells. Also, the system on chip includes a software module associated with the real time counter module to generate one or more control signals to one or more devices external to the system on chip during a sleep mode of the system on chip.