System on Chip Jumper Routing Cavity Interconnect

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Solution Overview

Problem

The presence of cavities in motherboards complicates the routing of electrical signals, as it limits the area for routing traces, making it difficult to maintain the same number of communication pathways without increasing the dimensions of the motherboard.

Innovation Solution

Incorporating a jumper within the system on a chip's routing layers, which acts as a bypass for electrical signals, allowing them to be transmitted without interacting with other components and thus facilitating communication across the cavity in the motherboard.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a cavity is included in the motherboard to reduce dimensions, then the overall device size is minimized, but the routing of electrical signals becomes more difficult and the number of communication pathways decreases

Engineering Contradiction:
Improvemotherboard dimensionsVSAvoidsignal routing capability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The jumper extends vertically through the substrate from a first routing layer to a second routing layer, utilizing the third dimension (z-axis) to create electrical connections that bypass the cavity. This vertical interconnection allows signals to route around the cavity without increasing the motherboard's planar dimensions, resolving the contradiction between compact size and signal routing capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The jumper acts as an intermediary element that bridges the discontinuity created by the cavity. By providing a dedicated vertical connection path through the substrate, the jumper mediates between routing layers that would otherwise be disconnected by the cavity, maintaining signal transmission capability while preserving the compact motherboard design.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the motherboard dimensions are increased to maintain the same number of routing pathways, then signal routing capability is preserved, but the overall device size increases

Engineering Contradiction:
Improvenumber of communication pathwaysVSAvoidmotherboard dimensions
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

Instead of expanding the planar routing area to accommodate additional pathways, the invention utilizes the vertical dimension by extending jumpers through multiple routing layers. This allows multiple communication pathways to be established within the same footprint by stacking routing layers vertically, thereby maintaining signal routing capability without increasing motherboard dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The jumper structure embeds vertical interconnection capabilities within the existing substrate structure. By nesting the jumper conductors within the substrate material and routing layers, the design achieves multiple communication pathways through layered integration rather than lateral expansion, preserving compact dimensions while enhancing routing capability.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS10785872B2Package jumper interconnect
Publication Date: 2020.09.22 INTEL CORP
  • US10785872B2 patent drawing
  • US10785872B2 patent drawing
  • US10785872B2 patent drawing

AI summary

A jumper may be adapted to transmit an electrical signal. The jumper may be included in a system on a chip. The system on a chip may include a substrate, and the substrate may include one or more routing layers. The jumper may be included in the one or more routing layers of the substrate. A first interconnect may be positioned on a first side of the system on a chip, and a second interconnect may be positioned on a second side of the system on a chip. The jumper may be in electrical communication with the first interconnect, and may be in electrical communication with the second interconnect. The jumper may be electrically isolated from other components of the system on a chip, such as one or more die coupled to the substrate.