SoC Leakage Power Reduction via Integrated Thermoelectric Cooling
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Solution Overview
Problem
As portable computing devices scale to smaller silicon process technology nodes, leakage power consumption increases due to smaller transistor gate lengths and higher transistor densities, leading to higher operating temperatures and power densities, posing a challenge for managing battery life and power consumption.
Innovation Solution
Implementing a system with dedicated thermoelectric coolers for each chip section on a system-on-chip (SoC) and a controller to monitor and control temperature differentials across these coolers, optimizing their operation to minimize the combined power consumption of both the chip sections and the coolers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the SoC scales to smaller silicon process technology nodes to increase performance and functionality, then the transistor density and processing power improve, but the leakage power consumption increases exponentially
Solution Approach 1:
The patent divides the SoC into multiple temperature zones with dedicated thermoelectric coolers for each zone, allowing independent temperature control. This segmentation enables targeted cooling of high-leakage areas without cooling the entire chip, reducing overall power consumption while maintaining high transistor density for processing power.
Solution Approach 2:
The patent dynamically adjusts the operating parameters of thermoelectric coolers based on real-time temperature monitoring. By changing the current applied to each cooler according to measured temperature differentials, the system optimizes the balance between cooling effectiveness and power consumption, addressing the exponential leakage issue without sacrificing processing capability.
2Loss of energy
If dedicated thermoelectric coolers are added to each chip section to reduce leakage power, then the leakage power consumption decreases, but the device complexity increases
Solution Approach 1:
The patent implements a unified temperature monitoring and control system that manages multiple thermoelectric coolers through a single controller. This multi-functional approach allows one control unit to coordinate numerous coolers, reducing the need for separate control circuits for each cooler and thereby limiting the increase in device complexity while achieving effective leakage power reduction.
Solution Approach 2:
The system uses temperature sensors that automatically monitor and provide feedback to the control logic, which then adjusts cooler operation autonomously. This self-regulating mechanism reduces the need for external intervention and simplifies the overall control architecture, managing the complexity introduced by multiple dedicated coolers.
3Loss of energy
If the thermoelectric coolers operate at higher cooling capacity to reduce chip temperature, then the leakage power reduction improves, but the power consumption of the coolers themselves increases
Solution Approach 1:
The patent implements dynamic control of thermoelectric cooler operation based on real-time temperature measurements. The control logic continuously monitors temperature differentials and adjusts the current applied to each cooler, enabling the system to operate at optimal cooling capacity rather than maximum capacity. This dynamic adjustment reduces the power consumed by coolers while maintaining effective leakage power reduction.
Solution Approach 2:
The system incorporates temperature sensors that provide continuous feedback to the control logic, which then adjusts cooler operation accordingly. This feedback mechanism ensures that coolers consume only the necessary power to achieve the desired temperature reduction, preventing excessive power consumption while effectively reducing chip leakage power.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces leakage power consumption by operating the thermoelectric coolers at an optimal point, leading to a significant reduction in total power consumption and extended battery life.
Implementation Method 1
systems and methods for reducing leakage power of a system on chip with integrated thermoelectric cooling
Data Source
AI summary
Systems, methods, and computer programs are disclosed for reducing leakage power of a system on chip (SoC). One such method comprises monitoring a plurality of temperature differentials across a respective plurality of thermoelectric coolers on a system on chip (SoC). Each of the thermoelectric coolers is dedicated to a corresponding one of a plurality of chip sections on the SoC. The thermoelectric coolers are controlled based on the plurality of temperature differentials to minimize a sum of a combined power consumption of the plurality of chip sections and the plurality of corresponding dedicated thermoelectric coolers.