Multi-Chip Link Authorization for SOC Resource Conflict Control
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Solution Overview
Problem
Conventional electronic devices face issues such as resource usage collisions, interference in shared communication bands, incompatible modes of operation, and transmit power management among concurrently active system on chips (SOCs), which are typically resolved by a central processor coordinating across multiple SOCs.
Innovation Solution
An integrated circuit (SOC) with an interface circuit and processor circuit that communicates over a multi-drop bus or point-to-point connections, authorizes activities through a configurable direct connection, and coordinates operations with another SOC using an authorization signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a central processor coordinates operations across multiple SOCs, then resource usage conflicts are resolved, but system complexity and coordination overhead increase
Solution Approach 1:
The patent divides the coordination function into two segments: a central processor that handles high-level resource allocation and authorization, and individual SOCs that autonomously manage their own operations and communicate directly with each other. This segmentation reduces the coordination overhead on the central processor while maintaining reliable resource management through the authorization signal mechanism.
Solution Approach 2:
The patent introduces an authorization signal as an intermediary mechanism between SOCs. When one SOC needs to use resources controlled by another SOC, it requests authorization through the multi-drop bus, and the controlling SOC responds with an authorization signal. This intermediary mechanism enables direct SOC-to-SOC coordination without burdening the central processor with every coordination detail.
2Adaptability or versatility
If multiple SOCs operate concurrently, then functionality and communication capabilities increase, but interference in shared communication bands and resource collisions occur
Solution Approach 1:
The patent implements a feedback mechanism where SOCs monitor the operational state of shared resources and communicate this information to controlling SOCs through the multi-drop bus. When resources are in use, the controlling SOC receives feedback and denies authorization requests until the resource becomes available. This feedback loop prevents resource collisions and interference in shared communication bands while allowing multiple SOCs to operate concurrently.
3Productivity
If direct SOC-to-SOC communication is enabled, then coordination efficiency improves, but security risks and unauthorized access increase
Solution Approach 1:
The patent implements preliminary authorization action before direct SOC-to-SOC communication occurs. An SOC must first request authorization through the multi-drop bus, and the controlling SOC must issue an authorization signal before the requesting SOC can access controlled resources. This preliminary authorization step ensures security is established before productivity-enhancing direct communication occurs, preventing unauthorized access while maintaining coordination efficiency.
Data Source
AI summary
Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity.