SoC Loopback Control Circuit for DSI to CSI Testing

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Solution Overview

Problem

The increasing complexity of system on chip (SoC) manufacturing leads to higher fault rates, requiring effective testing methods to identify faulty components, particularly in the display serial interface (DSI) and camera serial interface (CSI), which often necessitate external devices for loopback testing, increasing costs and time.

Innovation Solution

Incorporating a loopback control circuit and registers within the SoC to enable data loopback from the DSI to CSI, allowing for internal testing without external devices, using flags to manage operation modes and protocol conversions for packet headers and payloads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If external devices are used for loopback testing of DSI and CSI interfaces, then testing accuracy is improved, but device complexity and testing cost increase

Engineering Contradiction:

Improvetesting accuracyVSAvoidtesting setup complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the DSI host device and CSI host device into a single SoC chip, integrating both interfaces and their control functionality. This eliminates the need for separate external testing devices, reducing device complexity while maintaining testing accuracy through internal loopback capability.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The SoC chip performs multiple functions: it serves as both the DSI host device and CSI host device, and additionally functions as its own testing device through the loopback control circuit. This multi-functionality eliminates the need for external specialized testing equipment.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If external devices are used for loopback testing, then fault detection capability is improved, but testing time increases

Engineering Contradiction:

Improvefault detection capabilityVSAvoidtesting time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The loopback control circuit and testing functionality are pre-integrated into the SoC chip during manufacturing. This preliminary integration allows testing to begin immediately without external device connection setup, reducing testing time while maintaining fault detection capability.

Inventive Principle:

Principle #10Preliminary action

3Measurement precision

If external chips are used for testing, then testing accuracy is improved, but manufacturing cost increases

Engineering Contradiction:

Improvetesting accuracyVSAvoidmanufacturing cost

Core Design Contradiction:

Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent combines the testing functionality with the main SoC chip, eliminating the need for separate external testing chips. This integration reduces component count and assembly complexity, thereby reducing manufacturing costs while maintaining testing accuracy.

Inventive Principle:

Principle #5Merging (Combining)

4Ease of manufacture

If internal loopback testing is implemented, then manufacturing cost is reduced, but device complexity increases

Engineering Contradiction:

Improvemanufacturing costVSAvoidinternal circuit complexity

Core Design Contradiction:

Ease of manufactureVSDevice complexity

Solution Approach 1:

The loopback control circuit serves as an intermediary component that manages the internal data routing between DSI and CSI interfaces. This dedicated control circuit simplifies the overall architecture by providing a clear, managed path for loopback testing without requiring complex external connections.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10965934B2System on chip and integrated circuit for performing data loopback and mobile device including the same

Publication Date: 2021.03.30 SAMSUNG ELECTRONICS CO LTD

AI summary

A system on chip includes a display serial interface (DSI) host device, a camera serial interface (CSI) host device, a first register, and a loopback control circuit. The first register is configured to store a first flag indicating whether the system on chip is operating in a loopback mode or a non-loopback mode. The loopback control circuit is configured to loop back data generated by the DSI host device to the CSI host device in response to the first flag indicating that the system on chip is operating in the loopback mode.