SoC Memory Controller Dynamic Tag Region Allocation
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Solution Overview
Problem
Existing SoC technologies face challenges in efficiently securing memory capacity while enhancing memory security, particularly when a dedicated space for tag data is allocated in a memory device.
Innovation Solution
The proposed solution involves an SoC that dynamically uses a tag region of a memory device to store both tag data and normal data, allowing for efficient allocation of memory resources and enhancing memory security by eliminating the need for a dedicated tag data space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dedicated space for tag data is allocated in a memory device, then memory security is enhanced, but memory capacity is reduced
Solution Approach 1:
The patent implements dynamic allocation of the tag region by allowing the memory controller to flexibly assign the tag region as either tag data storage or normal data storage based on system needs. This is achieved through address translation mechanisms where the same physical region can serve different logical purposes at different times, resolving the contradiction between security requirements and capacity utilization.
Solution Approach 2:
The tag region is designed to serve multiple functions: it can store tag data for security operations when needed, or function as additional normal data storage when security operations are not active. This multi-functionality allows the same memory space to contribute to both security enhancement and capacity expansion, eliminating the need for dedicated exclusive space.
2Quantity of substance
If the tag region is used to store normal data, then memory capacity is increased, but memory security operations become complex
Solution Approach 1:
The patent introduces an address translation intermediary (memory controller with address translation logic) that mediates between the processor's logical address requests and the physical memory layout. This intermediary automatically handles the complexity of determining whether to access tag data or normal data in the shared tag region, shielding the processor from operational complexity while enabling flexible capacity utilization.
Solution Approach 2:
The memory controller implements self-service mechanisms by automatically managing the dual-purpose nature of the tag region without requiring processor intervention. The controller autonomously determines operation types (tag operation vs. normal operation) and directs accesses appropriately, reducing the burden on the processor and simplifying the overall system operation despite the region's dual functionality.
3Ease of operation
If a dedicated tag data space is allocated, then tag operations are simplified, but adaptability of memory usage is reduced
Solution Approach 1:
The system dynamically adapts the tag region's purpose based on operational context. During security-sensitive operations, the region functions for tag data with simplified access patterns; during normal operations, it provides additional storage capacity. This dynamic adaptation maintains operational simplicity when needed while maximizing flexibility and capacity utilization overall.
Data Source
AI summary
A system-on-chip includes a memory controller configured to control a memory device including a tag region and a data region and a processor configured to control a memory operation of the memory controller on the memory device. The processor is further configured to fix a start position of the tag region and a start position of the data region in the memory device, and transmit an access request and a first address indicating a memory region of the memory device to the memory controller. The memory operation on the normal data is to be performed on the memory region in one of the tag region and the data region. The memory controller is further configured to perform the memory operation on the normal data based on the first address in response to the access request.