SoC Memory Manager Dynamic Module Switching

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Solution Overview

Problem

Current computing devices face challenges in power efficiency and memory management, as DIMMs remain active even when not in use, leading to wasteful power consumption, especially in battery-operated devices, and there is no technology to shutdown or replace memory devices on-the-fly without risking data corruption or OS inflexibility.

Innovation Solution

A system-on-chip (SoC) memory manager dynamically shuts down and restarts off-chip memory modules by transferring data to a low-power secondary memory, such as flash or SATA, allowing for extended battery life and seamless operation without data loss, even in mission-critical systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If DIMMs remain active continuously to maintain system readiness, then system availability is improved, but power consumption increases significantly

Engineering Contradiction:
Improvesystem availabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic memory module switching that allows the system to transition between having active DIMMs and inactive DIMMs based on operational needs. The memory controller can deactivate unused DIMMs to save power while maintaining system functionality through selective activation, resolving the contradiction between continuous availability and power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system discards the state of inactive DIMMs by transferring their data to backup memory (flash storage or second DIMM) before deactivation. This allows the DIMMs to be powered down completely, recovering power savings while ensuring data is preserved in alternative storage locations for system recovery.

Inventive Principle:
Principle #34Discarding and recovering

2Use of energy by moving object

If memory modules are shut down to save power, then power efficiency is improved, but data loss and system instability occur

Engineering Contradiction:
Improvepower efficiencyVSAvoiddata integrity
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

Before shutting down a memory module, the system performs preliminary data transfer operations to backup memory or alternative DIMMs. This preliminary action ensures all critical data is preserved before the power-down occurs, preventing data loss while enabling power savings.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces backup memory (flash storage or secondary DIMM) as an intermediary between the active memory and the shutdown state. This intermediary receives data copies before the original memory is deactivated, serving as a safety mechanism that prevents data loss during the shutdown process.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If a single memory module is used to simplify the system, then device complexity is reduced, but thermal management capability is limited

Engineering Contradiction:
Improvememory configurationVSAvoidthermal management
Core Design Contradiction:
Device complexityVSTemperature

Solution Approach 1:

The system segments memory functionality across multiple independent DIMMs that can be individually controlled. This segmentation allows selective activation of specific memory modules based on thermal conditions, enabling granular thermal management while maintaining relatively simple individual module designs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic control of multiple memory modules where the system can activate or deactivate specific DIMMs based on real-time thermal monitoring. This dynamic approach provides thermal management capability without requiring complex static hardware designs, as the control logic adapts to thermal conditions.

Inventive Principle:
Principle #15Dynamics

4Productivity

If multiple memory modules are added to improve performance and thermal management, then system capability is improved, but device complexity increases

Engineering Contradiction:
Improvesystem performanceVSAvoidmemory controller configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory controller is designed with multi-functionality to manage multiple DIMMs through a unified interface and control mechanism. This universal design allows the same controller hardware and software framework to handle single or multiple memory modules, improving system performance capabilities without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses dynamic memory configuration where the controller can selectively activate, deactivate, or switch between multiple DIMMs based on operational needs. This dynamic approach allows the system to scale performance by activating additional memory modules only when needed, rather than requiring complex static configuration for all possible scenarios.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8607023B1System-on-chip with dynamic memory module switching
Publication Date: 2013.12.10 MACOM CONNECTIVITY SOLUTIONS LLC
  • US8607023B1 patent drawing
  • US8607023B1 patent drawing
  • US8607023B1 patent drawing

AI summary

A system and method are provided for using a system-on-chip (SoC) memory manager to dynamically shutdown and restart an off-chip memory module. After determining that a memory switch is to be enacted, an SoC memory switching core asserts a hold on processor operations. The memory switching core transfers data from a source memory module to a destination memory module. In a shutdown operation, data is transferred from a first memory module source to an external second memory module destination interfaced to the memory switching core. In a restart operation, data is transferred from the second memory module source to the first memory module destination. The memory switching core uses a memory map for translating the data addresses in the source memory module to data addresses in the destination memory module. Then, the memory switching core deasserts the hold on processor operations.