SoC Internal Memory Routing for Secure Firmware Boot

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Solution Overview

Problem

Conventional root of trust (RoT) mechanisms fail to protect firmware integrity when the non-volatile memory storing the firmware is within a system on a chip (SoC), as the SPI bus for accessing internal flash is not accessible to the RoT, rendering the computing system less secure.

Innovation Solution

Implementing a root of trust hardware connected to the internal memory and a selector to intercept commands, allowing secure communication via SPI ports, with the selector controlling the routing of commands through either the processor directly to the internal memory or through the RoT hardware for filtering unexpected commands.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional RoT mechanisms are used with external non-volatile memory, then firmware security is maintained, but the system cannot protect firmware stored in internal SoC memory

Engineering Contradiction:
Improvefirmware securityVSAvoidcompatibility with internal memory
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

A selector circuit is introduced as an intermediary component between the processor and internal memory. This selector can route commands either directly to memory or through the RoT hardware, enabling the RoT mechanism to protect internal memory firmware while maintaining system functionality. The intermediary allows the RoT hardware to inspect and control commands without preventing normal memory operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the SPI bus is made accessible to RoT hardware for internal memory protection, then firmware integrity is protected, but the system complexity increases

Engineering Contradiction:
Improvefirmware integrityVSAvoidsystem architecture
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The selector circuit provides dynamic routing capability, allowing the system to switch between two operational modes: direct memory access for normal operations and RoT-mediated access for security-critical operations. This dynamic approach enables the system to maintain simplicity during routine operations while activating security measures only when needed, thus balancing protection requirements with system complexity.

Inventive Principle:
Principle #15Dynamics

3Reliability

If all commands are routed through RoT hardware for security checking, then firmware protection is maximized, but processing speed decreases

Engineering Contradiction:
Improvefirmware protectionVSAvoidcommand processing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The command routing is segmented into two distinct paths: a fast direct path for trusted or routine commands that bypass the RoT hardware, and a secure path through the RoT hardware for commands requiring verification. This segmentation allows the system to maintain high processing speed for common operations while ensuring security for critical firmware protection operations, avoiding the performance penalty of routing all commands through security checks.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12481762B2Systems and methods for using internal memory of a system on chip in a security boot
Publication Date: 2025.11.25 QUANTA COMPUTER INC
  • US12481762B2 patent drawing
  • US12481762B2 patent drawing
  • US12481762B2 patent drawing

AI summary

A computing system is provided. The computing system includes a system on a chip. The system on a chip includes a processor and an internal memory. The computing system further includes a root of trust hardware connected to the internal memory and configured to intercept commands from the processor to the internal memory.