SoC Memory Mapping for Low-Latency User Space Access

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Solution Overview

Problem

Existing techniques for accessing peripheral devices from user space in an operating system result in significant delays and errors due to indirect communication through the kernel space, which is undesirable for real-time applications.

Innovation Solution

Mapping the address space of peripheral device memory to both kernel and user spaces, allowing direct access via separate data paths using the kernel space's UIO framework, enabling simultaneous access by kernel and user space drivers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If user space applications communicate with peripheral devices through the kernel space using system calls, then system security and stability are maintained, but significant delays occur in packet processing

Engineering Contradiction:
Improvesystem stabilityVSAvoidpacket processing delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the address space into separate kernel space and user space segments, with the peripheral device memory mapped to both spaces. This allows user space applications to access peripheral devices directly through their own address space mapping, bypassing the kernel space communication path and reducing packet processing delays while maintaining system stability through controlled mapping mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces the UIO (Userspace I/O) framework as an intermediary that enables direct user space access to peripheral devices. The UIO framework acts as a mediator that maps the peripheral device memory to user space address space, allowing fast direct access while maintaining the protective boundary between user space and kernel space, thus resolving the contradiction between speed and stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If user space applications directly access peripheral devices, then packet processing speed improves, but system complexity increases

Engineering Contradiction:
Improvepacket processing speedVSAvoidaddress space mapping complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent implements a universal address space mapping mechanism through the UIO framework that can handle multiple peripheral devices and multiple user space applications simultaneously. The same mapping infrastructure serves both kernel space and user space access needs, reducing overall system complexity despite enabling direct user space access to peripheral devices.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of operation

If the address space of peripheral device memory is mapped to both kernel and user spaces, then direct access from user space is enabled, but memory access conflicts may occur

Engineering Contradiction:
Improvedirect access capabilityVSAvoidmemory access consistency
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements synchronization mechanisms that provide feedback between kernel space and user space access operations. When one space accesses the peripheral device memory, the other space is notified or blocked to prevent conflicts, ensuring memory access consistency while maintaining the direct access capability enabled by dual mapping.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20260072818A1Method for accessing system-on-chip (SOC) memory from user space
Publication Date: 2026.03.12 QUALCOMM INC
  • US20260072818A1 patent drawing
  • US20260072818A1 patent drawing
  • US20260072818A1 patent drawing

AI summary

The present disclosure is directed to a method for accessing memory. The method includes mapping an address space for the memory to an address space for a kernel space. The method includes mapping the address space for the memory to an address space for a user space using the kernel space. The method includes accessing the memory via the address space for the kernel space and the address space for the user space.