SoC On-Chip Non-Volatile Memory for Fast System Resume

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Solution Overview

Problem

The existing systems that incorporate a system-on-a-chip (SoC) device with on-chip volatile main memory require a lengthy time to start up due to the process of loading boot code and operating systems from external storage into volatile memory, which can be inefficient, especially when resuming from a power-off state.

Innovation Solution

Incorporating on-chip non-volatile memory that stores system state information and boot instructions, allowing the SoC device to resume from a prior state without power removal, by executing instructions directly from the non-volatile memory and reducing the need for external volatile memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If boot code and operating system are loaded from external storage into volatile memory, then the system can operate with fast access speed, but the startup time becomes lengthy

Engineering Contradiction:
Improveoperating speedVSAvoidstartup time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent combines volatile memory and non-volatile memory into a single integrated memory device, allowing the system to load boot code and operating system directly into the non-volatile portion of the integrated memory, eliminating the need for external storage and reducing startup time while maintaining fast access speeds during operation

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system prepares the boot code and operating system in advance by storing them in the non-volatile memory portion of the integrated memory device, so that when startup is required, the code is already positioned and ready for immediate execution, significantly reducing startup time

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If external volatile memory and secondary storage are used, then the system has sufficient storage capacity, but the system cost increases

Engineering Contradiction:
Improvestorage capacityVSAvoidsystem cost
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges volatile memory and non-volatile memory into a single integrated memory device, eliminating the need for separate external volatile memory and secondary storage components, thereby reducing system complexity and cost while providing sufficient storage capacity through the combined memory structure

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated memory device serves multiple functions simultaneously - it acts as both volatile memory for fast access during operation and non-volatile memory for storing boot code and operating system, replacing multiple separate components and reducing overall system cost

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10228745B2Resuming a system-on-a-chip device
Publication Date: 2019.03.12 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US10228745B2 patent drawing
  • US10228745B2 patent drawing
  • US10228745B2 patent drawing

AI summary

As part of starting a system including a system-on-a-chip (SoC) device from a mode in which power is removed from the system, the SoC device determines, based on the metadata, whether to resume the system to a prior system state. In response to the metadata indicating that the system is to be resumed to the prior system state, the system is resumed to the prior system state using system state information stored in the on-chip non-volatile memory.