SoC Performance Controller Using History Tables
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Solution Overview
Problem
System on chips (SoCs) face challenges in optimizing processor performance due to inefficient operations between different software execution sections, as they rely on hardware status measurements for performance management, leading to suboptimal processing speed, power consumption, and heat control.
Innovation Solution
An SoC with a performance controller that generates control signals based on history performance information stored in tables, optimizing processor performance for each function executed by dynamically adjusting operating voltage and frequency, and controlling functional blocks to improve processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the SoC measures processor performance based on hardware status information and controls performance based on measurement results, then the system can maintain basic performance management, but it is difficult to optimize processor performance efficiently between different software execution sections
Solution Approach 1:
The performance controller pre-generates control signals for different software execution sections based on historical performance information stored in the history table, before actually executing the code. This allows the system to have performance optimization strategies ready in advance for different execution contexts, rather than reacting only to current hardware status measurements.
Solution Approach 2:
The patent divides the performance control approach into separate segments: different history tables for different IPs (first history table for first IP, second history table for second IP), and different control strategies for different software execution sections. This segmentation allows targeted optimization for each component without requiring a monolithic complex control system.
2Speed
If the SoC uses dynamic voltage and frequency scaling (DVFS) and throttling control technology to optimize processor performance, then processing speed can be improved, but power consumption and heat generation management becomes more complex
Solution Approach 1:
The performance controller pre-determines appropriate voltage and frequency settings for different software execution sections by generating control signals in advance based on historical performance data. This prevents unnecessary high-power states and enables the processor to operate at optimal power levels from the start of each execution section, rather than adjusting reactively.
Solution Approach 2:
The patent dynamically changes operating parameters (voltage and frequency) based on the specific software execution section being executed. By selecting from pre-determined control signals corresponding to different execution sections, the system optimizes the balance between processing speed and power consumption for each specific workload type.
3Use of energy by moving object
If the SoC uses throttling control technology or active clock gating control technology to control activation and deactivation of functional blocks, then power consumption can be reduced, but processing efficiency between different software execution sections deteriorates
Solution Approach 1:
The performance controller pre-determines the activation and deactivation states of functional blocks for different software execution sections by generating control signals in advance. This ensures that functional blocks are activated before needed and deactivated after use, eliminating delays associated with on-the-fly activation/deactivation decisions and maintaining high processing efficiency while managing power consumption.
4Measurement precision
If the SoC measures performance based on current hardware status information, then real-time performance monitoring is achieved, but historical performance patterns and optimization opportunities are lost
Solution Approach 1:
The patent creates a copy of performance information by storing historical performance data in history tables for different IPs. These history tables preserve performance patterns from previous executions, allowing the system to learn from past behavior while continuing to monitor current hardware status for real-time control decisions.
Data Source
AI summary
A system on chip (SoC) includes a processor configured to execute code corresponding to at least one application and a performance controller configured to generate control information for controlling performance of the processor for each function to be executed by the processor by using a history table in which a plurality of history performance information items respectively corresponding to a plurality of functions included in the code are stored and to generate a control signal corresponding to the control information.