SOC Pin Time-Division Multiplexing for I2C and GPIO
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Solution Overview
Problem
The complexity and cost of System-On-a-Chip (SOC) applications are heightened due to the need for multiple pins to implement both I2C bus and GPIO interfaces, leading to inefficient pin resource utilization.
Innovation Solution
The SOC employs a selecting unit to switch between I2C bus and GPIO interface modes for at least one pin, using a bidirectional PAD unit with a pull-up resistor to enable time-division multiplexing, allowing a single pin to function as either a Serial Data (SDA) or Serial Clock (SCL) signal depending on the interface mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If different pins are used to implement I2C bus interface and GPIO interface, then interface functionality is ensured, but the number of pins increases and complexity and cost increase
Solution Approach 1:
The patent merges I2C bus interface and GPIO interface into a single pin by using a bidirectional PAD unit that can operate in different modes. The selecting unit switches between I2C mode and GPIO mode, allowing one pin to fulfill multiple interface functions, thereby reducing the total number of pins required while maintaining both interface functionalities.
Solution Approach 2:
The bidirectional PAD unit is designed with multi-functionality to support both I2C bus interface operations and GPIO interface operations. By configuring the PAD unit in different modes through the selecting unit, a single pin can universally serve multiple purposes: I2C data transmission, I2C clock transmission, and GPIO signal transmission, eliminating the need for separate dedicated pins for each function.
2Reliability
If a pin is used for I2C bus interface, then I2C data transmission is enabled, but the pin cannot be used for GPIO interface at the same time
Solution Approach 1:
The patent implements dynamic mode switching for the bidirectional PAD unit through the selecting unit. The PAD unit can dynamically change its operational mode between I2C bus mode and GPIO mode based on the current interface requirements. This dynamic reconfiguration allows the same pin to adaptively serve different interface functions at different times, resolving the conflict between I2C transmission reliability and interface versatility.
Solution Approach 2:
The selecting unit periodically switches between I2C mode and GPIO mode for the bidirectional PAD unit, enabling the pin to alternate between different interface functions. This periodic action allows the system to maintain I2C data transmission capability when needed while also providing GPIO interface capability at other times, achieving both reliability and adaptability through time-division multiplexing.
Data Source
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AI summary
A method for using pins in different mode during different time is provided. The method is able to make at least one pin of a SOC be used in a first interface mode or a second interface mode during different time; wherein the SOC comprises a first interface circuit, a first pin, a second interface circuit, and a second pin; the first interface circuit comprises a first bidirectional PAD unit, a first signal interface unit of the first interface mode and a interface unit of the second interface mode; the second interface circuit comprises a second bidirectional PAD unit, a second signal interface unit of the first interface mode. The method comprises: selecting the output of the first signal interface unit or the output of the interface unit of the second interface mode to be connected with the first pin through the first bidirectional PAD unit during different time.