SoC Pin Injection Current Detection During Low Power Mode Transitions
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Solution Overview
Problem
Entering and exiting low power modes in data processing systems poses challenges for detecting potential faults or hardware problems, as safety mechanisms like the fault collection and control unit are not operational during these states, leading to undetected issues that can cause unsafe operation or damage.
Innovation Solution
The implementation of pin injection current detector logic within the processor to identify injection currents during standby mode entry and uncertainty window reset handling circuits to detect problematic reset events, allowing for diagnostic information capture and potential wakeup events or logging to prevent system damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the system enters low power mode to reduce energy consumption, then power savings are achieved, but fault detection capability is lost
Solution Approach 1:
The system performs preliminary fault detection actions before entering low power mode by capturing diagnostic information during the transition period. The uncertainty window detection mechanism is activated before the FCCU is powered down, allowing the system to detect potential faults in advance while still maintaining low power operation.
Solution Approach 2:
An intermediary detection mechanism is introduced that operates during the transition period between normal mode and low power mode. This intermediary system captures diagnostic information and detects faults that would otherwise be missed, serving as a bridge between the fully operational fault detection system and the low power state where detection is unavailable.
2Use of energy by moving object
If the fault collection and control unit is deactivated during low power mode to save energy, then power consumption is reduced, but the ability to detect safety violations is lost
Solution Approach 1:
The system performs preliminary detection of safety violations and injection currents before the FCCU is deactivated. By capturing diagnostic information during the uncertainty window before low power mode activation, the system identifies potential safety issues in advance, maintaining safety monitoring capability without requiring continuous FCCU operation during low power state.
3Device complexity
If reset events are not monitored during uncertainty windows, then system complexity is reduced, but undetected faults can cause system damage
Solution Approach 1:
The patent extracts and isolates the critical detection function for reset events during uncertainty windows from the main FCCU system. A separate, simplified detection mechanism is implemented that specifically monitors for reset events during the critical transition period, removing the need for complex continuous monitoring while still preventing system damage from undetected faults.
Data Source
AI summary
A system-on-chip (SoC) having a switchable power domain capable of being placed in a standby mode during which a power supply of the switchable power domain is gated and having an always-on power domain. The always-on power domain includes an input sampling circuit, and the switchable power domain includes an input/output (IO) circuit configured to, during normal operation, receive data at a corresponding signal pin when an input buffer of the IO circuit is enabled, in which the corresponding signal pin is coupled to the input sampling circuit. The input sampling circuit is configured to, while the switchable power domain is entering the standby mode but before the power supply is gated, provide an override input enable signal to enable the input buffer of the IO circuit, sample an input bit value on the corresponding signal pin, and store the sampled bit value to provide an injection current fault indicator.