SoC Power Management Unit Software Control via APB

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Solution Overview

Problem

System-on-a-Chip (SoC) devices lack the ability for the Power Management Unit (PMU) to control changes in power state under software control without external trigger events, limiting flexibility in debugging and testing, and requiring alterations to external board states.

Innovation Solution

The PMU is enabled to change power states under software control by communicating with the SoC system controller over the Advanced Peripheral Bus (APB), allowing programmable changes in reset states without external triggers, with specific sequences and values required for power state requests to prevent inadvertent changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the PMU is isolated from software control and responds only to external events, then the device maintains hardware-level safety and stability, but the system lacks flexibility in debugging and testing and cannot control power state changes without external triggers

Engineering Contradiction:
Improvesoftware control capabilityVSAvoidpower state control safety
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A control register is introduced as an intermediary between the software system controller and the PMU. The register acts as a buffer that receives software requests and translates them into PMU-compatible commands, enabling software control while maintaining the PMU's safety mechanisms. The register serves as a controlled interface that prevents direct unauthorized access to PMU state machines.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the operational parameters of the PMU by enabling it to respond to both traditional external hardware events and new software-generated requests. The control register modifies the PMU's input parameters to include software-controlled values, allowing the system to transition between power states based on software decisions while maintaining hardware-level validation.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If external board level states must be adjusted for power state changes, then the system maintains hardware control and stability, but debugging and testing become more complex and time-consuming

Engineering Contradiction:
Improvedebugging and testing flexibilityVSAvoidexternal board state management
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent extracts the power state control functionality from the external hardware domain and relocates it to the software domain through the control register interface. This allows power state changes to be initiated and managed entirely through software, eliminating the need to physically adjust external board level states for debugging and testing purposes.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If the PMU accepts any software requests for power state changes, then the system gains maximum flexibility, but the risk of inadvertent power state changes increases

Engineering Contradiction:
Improvepower state control flexibilityVSAvoidinadvertent power state changes
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The control register implements preliminary validation logic that checks software requests before executing power state changes. The register compares incoming values against predetermined valid values and only processes requests that match expected patterns, preventing inadvertent or malicious power state changes while allowing legitimate software-controlled transitions.

Inventive Principle:
Principle #9Preliminary anti-action

4Reliability

If a full system reset is performed to restore known conditions, then the system returns to a stable state, but state data is lost and restart time increases

Engineering Contradiction:
Improvesystem state stabilityVSAvoidsystem restart time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the reset functionality into selective component-level resets rather than requiring a complete system reset. The PMU can now initiate targeted reset sequences for specific subsystems or modules while preserving the overall system state, allowing faster recovery from errors without losing all state data or requiring full system reinitialization.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9367107B2Method and system for controlling reset state change in a system-on-a-chip device
Publication Date: 2016.06.14 PSION INC
  • US9367107B2 patent drawing
  • US9367107B2 patent drawing
  • US9367107B2 patent drawing

AI summary

A method and system are set forth for enabling software control of a power management unit (PMU) in a System-On-a-Chip (SoC) device to effect changes in power state without having to adjust external board level states. In one embodiment, once the SoC system controller has been booted, it communicates with the PMU over a communication bus and is able to request changes in power states without requiring external trigger events. Complete remote control of power states according to the method and system set forth herein provides flexibility when debugging and testing SoC devices because there is no need to alter external board states. Also, providing programmable changes in reset states as an alternative to full system reset preserves state data so that the system can be restarted efficiently and quickly from known conditions.