SoC POR Sequencer and PMU Boot Initialization
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Solution Overview
Problem
The existing hardware power-on sequencing tasks for system-on-chip (SoC) initialization are prone to defects, leading to costly redesigns and delays in validation, as the necessary information for finalizing sequencing is often unknown until verification, and errors in hardware state machines prevent the SoC from booting.
Innovation Solution
A system-on-chip (SoC) with a hardware power-on-reset (POR) sequencer circuit and a platform management unit (PMU) that includes CPUs and ROM, where the POR sequencer performs minimal initialization tasks, and the PMU executes code from ROM to complete power-on initialization, allowing for modifications in the initialization code without re-designing hardware state machines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware state machines and associated circuitry are used to handle power-on sequencing tasks, then the SoC can perform initialization tasks in a specific sequence, but defects in the circuit design can prevent the SoC from booting and require costly redesigns
Solution Approach 1:
The initialization process is segmented into two distinct parts: hardware-based power-on sequencing for basic initialization, and software-based initialization for complex tasks. This separation allows the hardware to provide reliable basic sequencing while the software handles customizable initialization tasks, eliminating the need for costly hardware redesigns when initialization requirements change.
Solution Approach 2:
The patent replaces hardware state machines with a hybrid approach where a processor executes software code for initialization tasks. Specifically, a dedicated initialization processor or the main CPU executes initialization code stored in memory, substituting the rigid hardware state machine with a flexible software-based system that can be modified without physical redesign.
2Productivity
If hardware state machines are used for power-on sequencing, then initialization tasks can be performed, but any change to the design requires re-design of the hardware state machines which delays final validation
Solution Approach 1:
The initialization system transitions from a static hardware state machine to a dynamic software-based approach. The initialization code stored in memory can be dynamically modified, updated, and reconfigured without changing the underlying hardware architecture, enabling rapid iteration and validation during the development process.
Solution Approach 2:
The patent enables changes to initialization parameters and sequences by modifying software code rather than hardware design. Initialization tasks, sequencing order, and specific initialization parameters can be adjusted by changing software variables and code logic, allowing rapid prototyping and validation without time-consuming hardware redesign cycles.
3Measurement precision
If information for finalizing power-on sequencing is not known until verification, then the SoC can be tested, but defects require costly redesigns and delays
Solution Approach 1:
The patent performs preliminary initialization using hardware state machines to prepare the system for software execution. Basic power-on sequencing and critical initialization tasks are completed by hardware before transferring control to software-based initialization. This preliminary hardware action ensures the system is in a known good state for subsequent software verification, allowing defects to be identified and corrected in software without costly hardware redesigns.
Data Source
Figure 1A
Figure 1B~2
Figure 3
AI summary
In an example, a system-on-chip (SoC) includes a hardware power-on- reset (POR) sequencer circuit (142) coupled to a POR pin (135). The SoC further includes a platform management unit (PMU) (122), coupled to the hardware POR sequencer circuit, the PMU including one or more central processing units (CPUs) (304) and a read only memory (ROM) (312). The SoC further includes one or more processing units (116, 118, 120) configured to execute a boot process. The hardware POR sequencer circuit is configured to initialize the PMU. The one or more CPUs of the PMU are configured to execute code (334) stored in the ROM to perform a pre-boot initialization.