SoC Power Control Debug Circuit Segmentation
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Solution Overview
Problem
Debugging of power control circuits in system-on-chip (SoC) is challenging due to the integration of multiple components on a single chip, requiring efficient methods to control and monitor power supply and voltage levels for effective debugging.
Innovation Solution
Incorporating a debug circuit within the power control circuit that includes input/output pins for communication, a logic value debugger, an inserting debugger, and a variation debugger, along with a JTAG interface, to control and monitor voltage levels and variations, allowing for debugging operations through shared pins and external interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple components are integrated into a single chip to form an SoC, then the occupied area and power consumption are reduced, but the debugging complexity of power control circuits increases
Solution Approach 1:
The power control circuit is divided into multiple power domain blocks, each with independent power control. The debug circuit is segmented into specialized modules (logic value debugger, inserting debugger, variation debugger) that can independently debug different aspects of the power control circuit, reducing overall debugging complexity.
Solution Approach 2:
A dedicated debug circuit is introduced as an intermediary between the power control circuit and external debugging equipment. This debug circuit provides standardized interfaces (JTAG, I/O pins) and debugging functions, mediating the complex internal power control operations and making them accessible for external debugging without increasing user-facing complexity.
2Reliability
If a debug circuit is integrated into the power control circuit, then debugging capability is improved, but the device complexity increases
Solution Approach 1:
The debug circuit is merged with the power control circuit structure, sharing physical resources such as I/O pins and operating within the same power domain blocks. This integration provides debugging capability while minimizing additional complexity by reusing existing circuit elements rather than adding completely separate debugging infrastructure.
Solution Approach 2:
The debug circuit is designed with multi-functional debugging modules that can perform various debugging operations (logic value monitoring, signal insertion, voltage variation) through unified interfaces. The same I/O pins serve both normal system operation and debugging functions, and the debug circuit can debug multiple power domain blocks, reducing overall device complexity through resource sharing.
3Measurement precision
If specialized debugging modules are added to the debug circuit, then debugging precision is improved, but the device complexity increases
Solution Approach 1:
Different debugging modules are assigned to specific power domain blocks based on their debugging needs. Each module provides specialized debugging precision for its target domain while remaining inactive or dormant for other domains, allowing high debugging precision where needed without requiring all modules to be fully active throughout the entire system, thus managing complexity.
Data Source
AI summary
A system-on-chip (SoC) includes a core, a plurality of power domain blocks, and a power control circuit including a debug circuit. The power control circuit is configured to control power supplied to the core and each of the power domain blocks, and the debug circuit is configured to debug the power control circuit.