SoC Power Budget Allocation Using Per-Compute-Unit DPM Limits
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Solution Overview
Problem
Existing multi-thread power limiting solutions for system-on-chip (SoC) devices are prone to system level power and thermal violations due to reliance on maximum digital power meter (DPM) values across threads or processors, leading to performance issues when system power budgets dynamically change.
Innovation Solution
Implementing system level power management with externally controlled multi-thread power limiting that considers individual compute unit limits and power consumption estimates, using per-thread DPM values averaged and rounded to system level limits, independent of maximum DPM values, to control power allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If maximum DPM value across compute units is used for power limiting, then power control is simplified, but system level power violations occur and thermal management deteriorates
Solution Approach 1:
The patent segments the power management approach by transitioning from a single maximum DPM value control to individual per-compute-unit DPM values. Each compute unit's power consumption is independently monitored and controlled based on its own DPM readings, allowing precise power allocation and preventing system-level power violations while maintaining manageable complexity through modular control.
2Adaptability or versatility
If per-thread DPM values are averaged and rounded to system level limits, then fair power allocation is achieved, but measurement precision is reduced
Solution Approach 1:
The patent applies parameter changes by transforming the raw DPM values through averaging and rounding operations. Individual compute units' DPM values are averaged to determine a common system-level power limit, and this limit is rounded to appropriate precision levels. This transformation enables fair power allocation across compute units while adapting the measurement precision to system-level requirements.
Data Source
AI summary
A method for system level power management for a system-on-chip (SoC) includes executing multiple compute units in the SoC. The method also includes receiving a digital power meter (DPM) value for each compute unit. The DPM value comprises an estimated power consumption of the compute unit. The method further includes modifying, in response to an updated system power budget, a fair power resource allocation for each of the multiple compute units of the SoC based on a respective DPM value and the updated system power budget. The modifying occurs without relying on a maximum DPM value across threads or across processors.