SoC Power Error Reporting for Integrated Voltage Regulator Faults

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Solution Overview

Problem

In autonomous systems like vehicles and aircraft, functional safety is compromised by transient or permanent faults in power delivery elements integrated into System on Chip (SoC), particularly in voltage regulators, which are not effectively monitored or reported, posing risks to end users.

Innovation Solution

The implementation of an integrated voltage regulator with over/under voltage and current detection components, a power management controller, and redundant communication paths using machine check architecture and custom on-chip switching fabrics to generate and report power error signals, ensuring functional safety by detecting and mitigating faults in the power delivery system.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If power delivery elements are integrated into SoC for compactness, then device integration is improved, but monitoring and detection capability deteriorates

Engineering Contradiction:

Improveintegration levelVSAvoidfault detection capability

Core Design Contradiction:

Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent segments the monitoring function by implementing separate detection components (over-voltage detector, under-voltage detector, over-current detector) that are distributed throughout the SoC power delivery network. Each detector monitors specific parameters independently, allowing fault detection despite high integration levels.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediary detection components between the power delivery elements and functional logic. These intermediaries (detection circuits, sensors) act as mediators that monitor power parameters and generate error signals without disrupting the integrated architecture.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If redundant communication paths are implemented for error reporting, then functional safety is improved, but device complexity increases

Engineering Contradiction:

Improvefunctional safetyVSAvoidcommunication path structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges error reporting functionality into existing communication infrastructure. Error signals from detection components are combined with normal operational data and transmitted through shared communication paths, achieving redundancy without duplicating entire communication channels.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent implements multi-functional communication paths that handle both normal operational data transmission and error signal reporting. The same communication infrastructure serves multiple purposes, reducing the need for dedicated redundant channels while maintaining safety requirements.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12164370B2Power error monitoring and reporting within a system on chip for functional safety

Publication Date: 2024.12.10 INTEL CORP

AI summary

Methods, systems and apparatuses may provide for technology that includes a system on chip (SoC) having an integrated voltage regulator and a power management controller, and a first communication path coupled to the power management controller, wherein the first communication path is to carry power error information to the power management controller. The technology may also include a second communication path coupled to an error pin of the SoC, wherein the second communication path is to carry the power error information to the error pin, and wherein the power error information is associated with the integrated voltage regulator.