SoC Power Management for Image Formers
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Solution Overview
Problem
Image forming apparatuses face challenges in reducing power consumption, particularly in standby mode, as existing technologies fail to efficiently manage power usage across different operational modes, leading to high energy consumption that may not comply with emerging regulatory standards.
Innovation Solution
The implementation of a System-On-Chip (SoC) with volatile memory that operates in normal mode, copies data to internal memory upon inactivity, and progressively switches to power-saving modes by adjusting frequencies and shutting down components based on external signal inputs, allowing for efficient reactivation when needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the image forming apparatus operates in normal mode continuously, then operational readiness is maintained, but power consumption remains high
Solution Approach 1:
The patent implements dynamic power management by transitioning between multiple power saving modes (first, second, and third modes) with different levels of power reduction. The system dynamically adjusts its state based on operational requirements, allowing it to optimize the balance between power consumption and operational readiness through flexible mode switching rather than static operation.
Solution Approach 2:
The patent segments the power saving strategy into distinct hierarchical modes: first power saving mode with minimal power reduction, second power saving mode with moderate reduction, and third power saving mode with maximum reduction. This segmentation allows the system to progressively reduce power consumption while maintaining the option to quickly recover operational readiness at any level.
2Use of energy by moving object
If the apparatus enters deep power saving mode to reduce energy consumption, then power consumption decreases, but reactivation time increases
Solution Approach 1:
The patent applies preliminary action by maintaining critical system states and data in memory even during power saving modes. The volatile memory retains operational parameters and the system configuration remains prepared, allowing the apparatus to quickly transition back to normal operation without requiring complete system reinitialization, thus reducing reactivation time despite deep power saving.
Solution Approach 2:
The system uses dynamic wake-up mechanisms that allow rapid transition from deep power saving mode to normal operation. The control unit can quickly assess when reactivation is needed and efficiently restore power to critical components, optimizing the balance between power reduction and reactivation speed through dynamic control rather than static shutdown.
3Use of energy by moving object
If multiple power saving modes are implemented to optimize energy efficiency, then power consumption is reduced, but system complexity increases
Solution Approach 1:
The patent segments the complex power management task into manageable hierarchical modes with distinct characteristics. Each mode has specific power reduction levels and associated conditions, making the control logic more organized and easier to manage than a single complex power saving mechanism would be.
Solution Approach 2:
The patent manages different power saving modes by changing key system parameters such as clock frequencies, voltage levels, and component activation states. This parameter-based approach allows the system to transition between modes through controlled parameter adjustments rather than complex structural changes, simplifying the overall control mechanism.
Data Source
AI summary
An image forming apparatus includes a volatile memory and System-on-Chip (SoC) part. The SoC part includes an internal memory, a CPU for accessing the volatile memory in the normal mode; an interface part for receiving a external signal, and a control part for, when the interface part has no input during a first preset time, copying information stored to the volatile memory to the internal memory and converting to a first power saving mode to lower an operating frequency of the volatile memory and an operating frequency of the CPU, and when a normal mode switch signal is not input during a second preset time in the first power saving mode, controlling the CPU to access the information copied to the internal memory and converting to a second power saving mode to change the volatile memory to a self-refresh mode.