SOC Power Estimation via Sub-Block Weighting

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Solution Overview

Problem

Accurate estimation of power consumption in System on Chips (SOCs) is challenging due to varying power consumption based on specific programs executed and interactions between IP blocks, leading to inaccuracies in battery sizing and prolonged design cycles.

Innovation Solution

The method involves using activity counters to simulate power consumption across sub-blocks, determining weighting factors for each IP block, and estimating total power consumption by considering interactions between IP blocks, with optional threshold-based pruning to balance accuracy and speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional power consumption estimation methods are used for SOC, then the estimation process is simple, but the accuracy of power consumption estimation is poor due to not considering interactions between IP blocks

Engineering Contradiction:
Improvepower consumption estimation accuracyVSAvoidestimation method complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The SOC is divided into multiple sub-blocks, each containing specific IP blocks. Activity counters are placed at different locations within these sub-blocks to measure power consumption locally. This segmentation allows the system to capture detailed power consumption data from individual regions while maintaining manageability through modular analysis.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Activity counters serve as intermediary devices that measure and quantify the power consumption of individual IP blocks and sub-blocks. These counters act as mediators between the complex interactions of multiple IP blocks and the final power consumption estimation, converting complex interactions into measurable data that can be processed by the estimation algorithm.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If all IP blocks are considered in power consumption estimation, then the accuracy is improved, but the design cycle time increases

Engineering Contradiction:
Improvepower consumption estimation accuracyVSAvoiddesign cycle time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The method implements a two-stage approach: first, all IP blocks are analyzed to ensure complete coverage and accuracy; second, IP blocks with activity counter weights below a predetermined threshold are excluded from detailed analysis. This partial action principle allows the system to achieve sufficient accuracy by focusing computational resources on only the most significant power-consuming blocks, thereby reducing overall design cycle time.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system dynamically adjusts the parameter of IP block inclusion based on activity counter weights. By changing the threshold parameter, the estimation process can adapt between comprehensive analysis (high accuracy) and selective analysis (faster execution). This parameter-based control allows optimization of the trade-off between accuracy and design cycle time according to specific project requirements.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If activity counters are used to simulate power consumption, then the estimation accuracy is improved, but the computational complexity increases

Engineering Contradiction:
Improvepower consumption estimation accuracyVSAvoidsimulation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The method extracts only the essential power consumption data from activity counter measurements, separating the critical information needed for estimation from the full simulation data. By taking out and focusing on the most relevant metrics (activity counter weights and their contributions to total power), the system achieves accurate estimation without being overwhelmed by the full complexity of the simulation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system performs complete activity counter simulation for all IP blocks initially, then selectively applies detailed analysis only to those blocks with activity counter weights above the threshold. This partial application of the simulation complexity reduces the overall computational burden while maintaining accuracy for the dominant power-consuming blocks.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10108764B2Power consumption estimation method for system on chip (SOC), system for implementing the method
Publication Date: 2018.10.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10108764B2 patent drawing
  • US10108764B2 patent drawing
  • US10108764B2 patent drawing

AI summary

A method of estimating power consumption for a system on chip (SOC) includes simulating operation of a first sub-block to obtain power consumption information for the first sub-block including first activation information for a first IP block. The method further includes simulating operation of a second sub-block to obtain power consumption information for the second sub-block including second activation information for the first IP block and activation information for a plurality of second IP blocks. The method further includes determining a weighting factor for the first activation information for the first IP block, the second activation information for the first IP block and the activation information for each second IP block. The method further includes estimating power consumption for the SOC based on the first and second activation information for the first IP block, the activation information for at least one second IP block, and corresponding weighting factors.