SoC Power-Up Sequencing With Domain Isolation Signals
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Solution Overview
Problem
Existing integrated circuit devices face challenges in managing multiple power domains during power-up, leading to unstable operations, contention currents, and noise coupling due to different ramp rates of power supplies, which can cause damage and prolong power-up times.
Innovation Solution
A consolidated power-on-reset system (PORS) is implemented, utilizing level shifter circuits, voltage detection circuits, glitch filter circuits, and logic gates to generate isolation signals between power domains, controlling the enablement of level shifters and power-on-reset signals to manage power domains comprehensively, reduce contention currents, and minimize noise coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple power domains are supplied with different ramp rates during power-up, then power management flexibility is improved, but contention currents and noise coupling increase causing unstable operation
Solution Approach 1:
The power-on-reset system performs preliminary detection of power domain voltage status before enabling level shifters. The system detects whether power domains are in power-up or power-down state, and proactively generates isolation signals to prevent contention currents and noise coupling before they occur, ensuring stable operation while maintaining flexible power management
Solution Approach 2:
The patent introduces isolation signals as an intermediary mechanism between power domains with different ramp rates. These isolation signals control level shifters to isolate or connect power domains appropriately, mediating the interaction between domains to prevent harmful effects while allowing flexible power management
2Loss of time
If level shifters are enabled during power-up without proper sequencing, then power-up time is reduced, but contention currents cause damage and unstable operation
Solution Approach 1:
The system performs preliminary detection of power domain status before enabling level shifters. By detecting whether power domains are ready (voltage within valid range) before enabling level shifters, the system avoids contention currents that would occur if level shifters were enabled too early, while minimizing power-up time by enabling them as soon as conditions permit
3Object-affected harmful factors
If power domains are isolated to prevent noise coupling, then noise coupling is reduced, but power-up time increases due to sequential power management
Solution Approach 1:
The isolation signals are dynamically adjusted based on the real-time status of power domains. Rather than maintaining fixed isolation, the system continuously monitors power domain voltages and adjusts isolation signals accordingly - isolating domains when voltage differences would cause noise coupling, and connecting them when both domains are ready, thus minimizing power-up time while preventing noise coupling
Data Source
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AI summary
Apparatus and associated methods relate to a consolidated power-on-reset system (PORS) at a system-on-chip (SoC) level. In an illustrative example, an integrated circuit (215) may include a first power domain (300a) and a second power region (300b). A level shifter circuit (300c) may be coupled to translate data from the first power domain to the second power domain. A PORS (270) including a voltage detection circuit (410, 470a, 470b), a glitch filter circuit (415, 475a, 475b), and logic gates (420a, 420b) may be configured to generate isolation signals (310, 320) between the first power domain (300a) and the second power domain (300b). The level shifter circuit (300c) may be enabled in response to the generated isolation signals. By using the isolation signals, multiple power domains on IC (215) may be managed comprehensively during power-up to avoid unstable operation.