SoC Bus Arbiter QoS Signal Generation for Real-Time Priority
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
System-on-chip (SoC) devices face challenges in maintaining quality-of-service (QoS) requirements, particularly in real-time applications, where failure to meet these requirements leads to deterioration in performance, such as in LCD controllers used in multimedia data processing.
Innovation Solution
A method for determining access priority to a bus and slave block based on quality-of-service (QoS) signals, which involves setting real-time information and weights in registers, generating QoS signals from buffer information, and using a bus arbiter to prioritize bus use requests, with the option to select different look-up tables based on operation modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If arbitration is used to maintain QoS for connections, then service quality is improved, but system complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring QoS parameters, weights, and priority levels in registers before bus operations occur. The master block pre-calculates QoS signals based on buffer information and predetermined weights, allowing the bus arbiter to make rapid arbitration decisions without complex real-time calculations, thus improving QoS while limiting complexity growth.
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting QoS signals based on buffer occupancy levels and predetermined weights. The system changes priority parameters in response to buffer conditions, allowing flexible QoS management. Look-up tables store pre-computed priority values that can be quickly retrieved based on current buffer states, enabling adaptive QoS without complex real-time computation.
2Reliability
If real-time information is tracked and QoS signals are generated dynamically, then service quality is improved, but computational overhead increases
Solution Approach 1:
The patent reduces computational overhead by pre-calculating and storing QoS parameters, weights, and priority mappings in look-up tables during system initialization or configuration phases. During actual bus operations, the system simply retrieves pre-computed values based on current buffer states rather than performing complex real-time calculations, significantly reducing computational overhead while maintaining dynamic QoS responsiveness.
Solution Approach 2:
The patent uses look-up tables that contain pre-computed QoS signal values and priority mappings. Instead of recalculating QoS signals from scratch during each bus arbitration event, the system copies or retrieves pre-stored priority values based on current buffer conditions, reducing computational overhead while maintaining accurate QoS-based priority determination.
3Adaptability or versatility
If different operation modes are supported with mode-specific look-up tables, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent achieves multi-functionality by designing a unified bus arbitration system that supports multiple operation modes through a single configurable architecture. The same bus arbiter and QoS generation logic handle different operation modes by selecting appropriate look-up tables based on the current mode, allowing one system to serve multiple functions without requiring separate arbitration logic for each mode, thus limiting complexity growth.
Solution Approach 2:
The patent applies dynamics by enabling the system to dynamically switch between different look-up tables based on the current operation mode. The configuration registers and look-up table selections are dynamically adjusted according to operational requirements, allowing the system to adapt to different modes (such as power-saving modes, high-performance modes, etc.) without requiring permanent structural changes for each mode.
Data Source
AI summary
A system-on-chip (SoC), an electronic system including the same, and a method of operating the same are provided. The method includes setting real-time information indicating whether a master block is a real-time block in a real-time information register of the master block. A weight is set in a weight register of the master block. Buffer information of the master block is checked. A quality-of-service (QoS) signal is generated using the buffer information and the weight. A priority of the master block to use the bus is determined based on the QoS signal.