SoC Virtualized Device Reset Control Block
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Solution Overview
Problem
In multi-processor computing systems with virtualized devices, reset operations on shared hardware resources are complex and difficult to implement, especially in integrated Systems-on-a-Chip (SoCs), leading to increased silicon area and power consumption.
Innovation Solution
A method and apparatus for handling reset functions in a computing system, where a processor detects a reset condition and sends an error message for Programmed Input/Output (PIO) requests, using a reset control block to assert a reset signal, which sets registers to a default value, effectively resetting the device while disregarding transaction requests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated hardware is used to manage reset functions in virtualized devices, then reliability of reset operations is improved, but device complexity and silicon area increase
Solution Approach 1:
The patent combines multiple reset management functions into a unified reset control block that handles both processor-initiated and device-initiated resets through a single hardware structure. This consolidation reduces the number of separate hardware components needed while maintaining comprehensive reset control capability.
Solution Approach 2:
The reset control block is designed as a universal component that can initiate and manage multiple types of resets (processor reset, device reset, function-level reset) through a single hardware unit. This multi-functional design eliminates the need for separate dedicated hardware for each reset type, reducing overall complexity.
2Reliability
If comprehensive reset control hardware is implemented, then reset functionality is improved, but power consumption increases
Solution Approach 1:
By merging multiple reset control functions into a single reset control block, the patent reduces the total number of active hardware components that consume power. The unified structure allows shared resources and reduces redundant power consumption associated with multiple separate control units.
3Device complexity
If simple reset mechanisms are used, then device complexity is reduced, but ability to handle virtualized device reset conditions is insufficient
Solution Approach 1:
The reset control block acts as an intermediary between the processor and the virtualized device, managing all reset conditions through a single controlled interface. This mediator approach allows complex reset scenarios to be handled through a unified mechanism rather than requiring separate hardware paths for each reset type.
Solution Approach 2:
The system uses parameter changes in control registers within the reset control block to dynamically adjust reset behavior based on different virtualization scenarios. By changing register values rather than hardware structure, the system adapts to different reset conditions without increasing physical complexity.
Data Source
AI summary
An apparatus and method for resetting a virtualized device are disclosed. The virtualized device may be coupled to a first port on a communication unit via a first link. The first port may send one or more instructions to the virtualized device via the first link using a first communication protocol. A processor may be configured to detect a reset condition for the virtualized device. In response to the detection of the reset condition for the virtualized device, the first port may disregard one or more transaction requests made by the virtualized device. The first port may further send an error message to the processor in response to receiving a Programmed Input/Output (PIO) request from the processor after the detection of the reset condition.