Mixed-Signal SoC Sampling and Comparator Integration
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Solution Overview
Problem
Existing system-on-a-chip integrated circuits require multiple ADC chips for simultaneous analog signal sampling, limiting flexibility and increasing complexity, while discrete analog comparators are often used separately, which can be inefficient.
Innovation Solution
An integrated circuit design with multiple circuit groups, each containing programmable analog inputs, sample/hold circuits, comparators, and a single ADC module, allowing for simultaneous sampling and comparison of multiple analog inputs using on-chip programmable logic and a multiplexer, reducing the need for discrete comparators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple ADC chips are used to achieve simultaneous analog signal sampling, then the sampling capability is improved, but the device complexity and hardware requirements increase
Solution Approach 1:
The patent combines multiple sample/hold circuits and comparators into a single ADC chip, allowing simultaneous sampling of multiple analog inputs through on-chip integration. This merging approach eliminates the need for multiple separate ADC chips while maintaining simultaneous sampling capability.
Solution Approach 2:
The single ADC chip is designed to perform multiple functions including simultaneous sampling, signal holding, and comparison operations. The chip can handle multiple analog inputs through programmable connection logic, making one chip serve the role of multiple chips.
2Reliability
If discrete analog comparators are used separately, then the comparison function is achieved, but the system efficiency decreases and hardware requirements increase
Solution Approach 1:
The patent integrates analog comparators directly into the ADC chip structure, combining the conversion and comparison functions into a single unified device. This integration eliminates the need for separate discrete comparators and improves system efficiency through reduced signal paths and synchronized operation.
Solution Approach 2:
The comparators are prepared and configured within the ADC chip before the actual conversion and comparison operations occur. The programmable connection logic pre-establishes the signal paths, enabling immediate comparison operations without external configuration delays.
3Adaptability or versatility
If multiple ADC chips are used, then simultaneous sampling is achieved, but the flexibility and ease of operation are reduced
Solution Approach 1:
The patent incorporates programmable connection logic that allows dynamic reconfiguration of the ADC chip to accommodate different sampling scenarios. The system can be programmed to connect different analog inputs to the sample/hold circuits and comparators based on the specific application requirements, providing operational flexibility.
Solution Approach 2:
The single ADC chip is designed with universal functionality to handle various sampling configurations through programmable control. The same chip can be reconfigured for different numbers of simultaneous inputs, different comparison modes, and different signal routing arrangements.
Data Source
AI summary
An integrated circuit includes a plurality of circuit groups, each circuit group containing a plurality of analog inputs, a buffer, a sample/hold circuit and a comparator. Each buffer has an input to which any of the analog inputs in its group may be programmably connected. The output of each buffer is coupled to the input of the sample/hold circuit in the group. The output of each sample/hold circuit is coupled to one input of a multiplexer. The output of the multiplexer is coupled to the input of an amplifier having programmable gain and programmable offset. The comparator in each group has inputs that may be programmably coupled to at least one analog input in the group or to a reference voltage source.