SoC Telemetry Buffering for Synchronized Multi-Core Data Alignment
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Solution Overview
Problem
Monitoring telemetry data in System-on-Chip (SoC) designs with multiple processor cores is challenging due to high sampling rates, leading to difficulties in detecting missing data, misalignment in data storage, and identifying which processor cores are responsible for errors.
Innovation Solution
A synchronized system-on-chip telemetry aggregation and buffering system is implemented, using a telemetry processing engine with a telemetry memory bridge and control processors to align and store telemetry data, detect errors, and manage data structures for high sampling rates, enabling detection of missing data and establishing a synchronized state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high sampling rates are used to capture telemetry data, then data collection completeness is improved, but difficulty in detecting missing data and misalignment increases
Solution Approach 1:
The patent introduces an intermediary synchronization mechanism that mediates between multiple processor cores collecting telemetry data at high sampling rates. This intermediary system coordinates the collection process, ensuring that data from different cores is properly aligned and synchronized, thereby maintaining data collection completeness while reducing the difficulty of detecting missing data and misalignment.
Solution Approach 2:
The patent implements feedback mechanisms that monitor the telemetry data collection process in real-time. By continuously checking for missing data and misalignment conditions, the system can detect and correct issues as they occur, rather than discovering them after data collection is complete. This feedback approach maintains high sampling rate effectiveness while improving detectability of data quality issues.
2Reliability
If multiple processor cores collect telemetry data simultaneously, then data coverage is improved, but difficulty in identifying responsible processor cores for errors increases
Solution Approach 1:
The patent applies segmentation by dividing the telemetry data collection process into distinct segments, each associated with a specific processor core. By organizing data with clear segment boundaries and identifiers, the system maintains comprehensive data coverage from multiple cores while enabling easy identification of which core is responsible for any given data set or error condition.
Solution Approach 2:
The patent uses metadata tagging analogous to color-coding, where each processor core's telemetry data is marked with unique identifiers or tags. This allows the system to maintain data from multiple cores simultaneously while providing a clear visual or logical distinction that enables rapid identification of the responsible core for any particular data set or error, without compromising data coverage.
3Speed
If telemetry data is stored without synchronization, then storage speed is improved, but data misalignment occurs
Solution Approach 1:
The patent implements preliminary synchronization actions before telemetry data is stored. By pre-coordinating the timing and formatting of data from multiple processor cores before the actual storage operation, the system maintains high storage speed while ensuring that data is properly aligned and synchronized. This preliminary action prevents misalignment issues from occurring in the first place, rather than requiring costly post-storage corrections.
Data Source
AI summary
Embodiments of the present disclosure include techniques for synchronized telemetry aggregation and buffering in a system-on-chip (SoC). A first set of telemetry data associated with operation of a plurality of processor cores of the SoC during a first epoch is received. A second set of telemetry data associated with operation of the plurality of processor cores during a second epoch is received. The first set of telemetry data is determined as corresponding to an incomplete set of telemetry data for the first epoch. A message is transmitted to one or more controllers of the plurality of processor cores to modify operations associated with telemetry data collection as a result of the determination.