Trace Buffer Partitioning for SOC Debugging

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Solution Overview

Problem

Debugging embedded systems, particularly system-on-a-chip (SOC) designs, faces challenges in efficiently capturing and storing traces of multiple components due to the complexity of interrelationships and the obtrusive nature of existing debugging methods, which interfere with program execution and require significant on-die real estate for trace buffers.

Innovation Solution

A system-on-a-chip with a trace unit that collects and stores trace history and bus event statistics by monitoring qualified bus events across multiple buses, using a trace buffer with multiple physical partitions assigned to subsets of buses, allowing for flexible and efficient data storage and reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a large on-die trace buffer is used to capture program and data traces unobtrusively in real-time, then trace capture capability is improved, but on-die real estate consumption increases

Engineering Contradiction:
Improvetrace capture capabilityVSAvoidon-die real estate
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The trace buffer is divided into multiple physical partitions, each assigned to monitor specific buses or bus classes. This segmentation allows the system to capture traces from multiple buses simultaneously using separate, smaller buffer regions rather than requiring one large buffer, thereby reducing total on-die real estate consumption while maintaining comprehensive trace capture capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The trace buffer system is designed to monitor multiple buses and bus classes through a unified architecture with programmable control. The same trace buffer infrastructure can be dynamically configured to track different buses depending on debugging needs, providing multi-functional capability without requiring dedicated buffers for each bus, thus optimizing space utilization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of information

If distributed trace hardware is increased to monitor more buses, then trace visibility is improved, but device complexity increases

Engineering Contradiction:
Improvetrace visibilityVSAvoidtrace hardware complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

A single trace buffer system with programmable control logic serves multiple buses and bus classes, eliminating the need for separate dedicated trace hardware for each bus. The system can be dynamically configured through software to monitor any combination of buses, providing comprehensive trace visibility while maintaining low hardware complexity through resource sharing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The trace monitoring system employs dynamic, programmable control that allows the same hardware resources to be reconfigured for monitoring different buses based on debugging requirements. This dynamic allocation enables high trace visibility across multiple buses without the overhead of static, dedicated hardware for each bus, thereby reducing overall device complexity.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If a single large trace buffer is used for all buses, then trace storage capacity is improved, but power consumption increases

Engineering Contradiction:
Improvetrace storage capacityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by stationary object

Solution Approach 1:

The trace buffer is segmented into multiple physical partitions that can be independently activated. Each partition is assigned to monitor specific buses or bus classes, allowing the system to enable only the necessary buffer partitions for current debugging tasks. This selective activation reduces power consumption compared to keeping a single large buffer fully active, while maintaining sufficient trace storage capacity for the monitored buses.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9009541B2Efficient trace capture buffer management
Publication Date: 2015.04.14 APPLE INC
  • US9009541B2 patent drawing
  • US9009541B2 patent drawing
  • US9009541B2 patent drawing

AI summary

A system and method for efficiently storing traces of multiple components in an embedded system. A system-on-a-chip (SOC) includes a trace unit for collecting and storing trace history, bus event statistics, or both. The SOC may transfer cache coherent messages across multiple buses between a shared memory and a cache coherent controller. The trace unit includes a trace buffer with multiple physical partitions assigned to subsets of the multiple buses. The number of partitions is less than the number of multiple buses. One or more trace instructions may cause a trace history, trace bus event statistics, local time stamps and a global time-base value to be stored in a physical partition within the trace buffer.