SoC UART Interface Voltage Detection for Startup Compatibility

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Solution Overview

Problem

Existing SoCs with UART interfaces face issues in matching supply voltages with external devices, leading to potential damage due to mismatched voltages during startup, especially with advanced semiconductor processes where internal operating voltages are low.

Innovation Solution

The SoC incorporates a UART interface circuit, a detection circuit, and a control circuit to detect and adjust the supply voltage of UART signal pads based on the external operating voltage, ensuring compatibility with either a lower or higher voltage level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the SoC uses software to control the supply voltage setting for I/O pads, then the SoC can flexibly adapt to different external devices, but the startup process is delayed and the voltage matching is not guaranteed at critical startup stages

Engineering Contradiction:
Improvevoltage adaptabilityVSAvoidstartup time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The detection circuit detects the external device's voltage level before the SoC's software is executed, and the control circuit pre-configures the I/O pad voltage accordingly. This preliminary voltage matching action occurs during hardware initialization before software takes over, ensuring voltage compatibility is established in advance and eliminating startup delays.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The SoC's hardware circuits (detection circuit and control circuit) automatically perform voltage level detection and adaptation without requiring software intervention. The system serves itself by autonomously matching voltage levels during hardware initialization, freeing the software from this task and enabling faster startup.

Inventive Principle:
Principle #25Self-service

2Adaptability or versatility

If the SoC I/O pad supply voltage is set to a higher voltage (3.3V) to match external devices, then compatibility with external devices is improved, but the external device may be damaged due to voltage mismatch

Engineering Contradiction:
Improvevoltage compatibilityVSAvoidvoltage damage risk
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The detection circuit continuously monitors the external device's voltage level and provides feedback to the control circuit. Based on this feedback, the control circuit automatically adjusts the I/O pad supply voltage to match the detected external device voltage, ensuring voltage compatibility while preventing damage from voltage mismatch.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The control circuit dynamically changes the supply voltage parameter of the I/O pads based on the detected external device voltage level. When a 3.3V external device is detected, the I/O pad voltage is adjusted to 3.3V; when a 1.8V device is detected, the voltage is adjusted to 1.8V, ensuring safe and compatible operation in both cases.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If the SoC I/O pad supply voltage is set to a lower voltage (1.8V) to match internal device operating voltage, then power consumption is reduced, but compatibility with external devices requiring higher voltage is lost

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage compatibility
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The I/O pad supply voltage is made dynamic rather than fixed. The control circuit adjusts the voltage level in real-time based on the detected external device requirements. The voltage can be 1.8V when connected to low-voltage devices (saving power) or 3.3V when connected to high-voltage devices (ensuring compatibility), optimizing both power consumption and adaptability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12367166B2SoC with UART interface
Publication Date: 2025.07.22 REALTEK SEMICON CORP
  • US12367166B2 patent drawing

AI summary

A system on a chip (SoC) with a Universal Asynchronous Receiver/Transmitter (UART) interface includes a UART interface circuit, a detection circuit, and a control circuit. The UART interface circuit includes: a plurality of UART signal pads for receiving and transmitting signals; and a UART voltage pad for receiving an external operating voltage. The detection circuit is configured to detect the magnitude of the external operating voltage and thereby generate a detection result. The control circuit is configured to determine setting of a supply voltage for the plurality of UART signal pads according to the detection result. The control circuit makes the setting of the supply voltage be compatible with the external operating voltage according to the detection result, wherein the external operating voltage is a lower first voltage or a higher second voltage, and the first lower voltage is equal to an internal device operating voltage of the SoC.