SoC Voltage Regulator Fault Paths for Functional Safety Monitoring
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In autonomous systems like vehicles and aircraft, functional safety is compromised by transient or permanent faults in power delivery elements integrated into System on Chip (SoC), particularly in voltage regulators, which can lead to undetected errors due to lack of effective monitoring and reporting mechanisms.
Innovation Solution
The integration of an over voltage and under voltage warning detection component, an over voltage and under voltage error detection component, and an over current critical detection component within the SoC's integrated voltage regulator, along with a power management controller and additional communication paths using OR gates and latches to ensure error reporting redundancy, even in case of primary path failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If power delivery elements are integrated into SoC for compactness, then device integration is improved, but reliability of power monitoring deteriorates
Solution Approach 1:
The patent segments the power monitoring function into separate detection components (over voltage detection, under voltage detection, over current detection) that are distributed throughout the SoC power delivery network. Each segment monitors specific parameters and reports to a central power management controller, enabling reliable monitoring despite integration.
Solution Approach 2:
The patent introduces a power management controller as an intermediary component that mediates between the integrated voltage regulator and the rest of the system. This intermediary collects power status information from multiple sources, processes the data, and generates appropriate error signals, thereby maintaining reliable monitoring within the integrated architecture.
2Device complexity
If single communication path is used for error reporting, then device complexity is reduced, but reliability of error reporting deteriorates
Solution Approach 1:
The patent implements local quality by providing different communication path characteristics for different error conditions. Critical power errors have dedicated reporting paths with higher reliability, while less critical errors use standard paths. This ensures that important error information is reliably transmitted without requiring all paths to be equally complex.
Data Source
AI summary
Methods, systems and apparatuses may provide for technology that includes a system on chip (SoC) having an integrated voltage regulator and a power management controller, and a first communication path coupled to the power management controller, wherein the first communication path is to carry power error information to the power management controller. The technology may also include a second communication path coupled to an error pin of the SoC, wherein the second communication path is to carry the power error information to the error pin, and wherein the power error information is associated with the integrated voltage regulator.