SOC Voltage Regulator with Embedded MIM Capacitor
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Solution Overview
Problem
Current integrated voltage regulators in SOCs occupy too much space and block signals due to the positioning of coupled inductor voltage regulators and deep trench capacitors underneath the substrate, leading to inefficiencies in space utilization and signal interference.
Innovation Solution
Incorporating a metal-insulator-metal (MIM) capacitor within the wiring layers of the integrated circuit, allowing the voltage regulator components to be positioned beneath the MIM capacitor, reducing space usage and signal interference by using a redistribution layer to electrically couple the components efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If coupled inductor voltage regulator and deep trench capacitor are positioned underneath the substrate, then voltage regulation function is achieved, but space is occupied and SOC signals are blocked
Solution Approach 1:
The voltage regulator circuit is nested within the wiring layers of the SOC substrate itself, with the MIM capacitor formed between metal layers. This nesting approach allows the voltage regulator to be integrated into the existing substrate structure rather than occupying separate space underneath, effectively hiding the regulator within the layers of the SOC package.
Solution Approach 2:
The invention transitions from a two-dimensional layout where components are placed on the surface or underneath the substrate to a three-dimensional integration where the voltage regulator circuit is embedded within multiple wiring layers. The MIM capacitor utilizes vertical space between metal layers, moving the solution from planar to volumetric utilization.
2Reliability
If coupled inductor voltage regulator and deep trench capacitor are positioned underneath the substrate, then voltage regulation function is achieved, but SOC signals are blocked
Solution Approach 1:
By nesting the voltage regulator circuit within the wiring layers, the signal paths for SOC operations remain on the surface and are not obstructed by underlying components. The regulator is hidden within the layered structure, allowing signals to pass freely on the outer surfaces without interference from the voltage regulation components.
3Area of stationary object
If MIM capacitor is formed within wiring layers, then space consumption is reduced, but manufacturing complexity increases
Solution Approach 1:
The MIM capacitor fabrication is merged with the existing wiring layer formation process. The metal layers that form the capacitor electrodes are the same layers used for interconnect routing, and the dielectric material is deposited as part of the standard CMOS fabrication sequence. This combining of functions reduces the need for separate manufacturing steps.
Solution Approach 2:
The metal layers serve dual purposes: they function as both interconnect wiring for signal transmission and as electrodes for the MIM capacitor. This multi-functionality eliminates the need for dedicated capacitor electrode layers, simplifying the overall manufacturing process despite the three-dimensional integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces space consumption, minimizes signal blockage, and enhances efficiency by shortening the distance between the voltage regulator components, improving the overall performance of the integrated circuit.
Implementation Method 1
At least one metal-insulator-metal (MIM) capacitor may be formed within the plurality of wiring layers
Data Source
AI summary
In some embodiments, a method and/or a system may include an integrated circuit. The integrated circuit may include a semiconductor die. The integrated circuit may include a plurality of wiring layers. At least one metal-insulator-metal (MIM) capacitor may be formed within the plurality of wiring layers. The integrated circuit may include a circuit. The circuit may include at least an inductor and a voltage regulator which, with the MIM capacitor, forms a voltage regulator for the semiconductor die. The circuit may be coupled substantially below at least a portion of the MIM capacitor in the plurality of layers. The circuit may be electrically coupled to the capacitor through the plurality of wiring layers. The integrated circuit may include a plurality of electrical connectors, the plurality of electrical connectors coupled to the second surface at points separate from an area of the second surface that is occupied by the circuit.