Soft-Bit Data Compression Stages for Faster NAND Transfer
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Solution Overview
Problem
The increasing data storage demands in data centers and cloud computing environments necessitate improvements in storage device performance, lifespan, and data transfer speed, particularly in semiconductor-based storage devices where the data transfer rate between the controller and nonvolatile memory devices affects overall performance.
Innovation Solution
Incorporating a nonvolatile memory device with a compression circuit that compresses soft-bit data through multiple compression stages, controlled by a control logic circuit, to enhance data transfer efficiency and manage compression ratios dynamically.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If soft-bit data is transmitted without compression from the nonvolatile memory device to the controller, then the data transfer process is simple, but the data transfer speed and bandwidth utilization are reduced
Solution Approach 1:
The compression circuit is divided into multiple compression stages, where each stage processes a portion of the soft-bit data independently. This segmentation allows the compression function to be implemented without requiring a single complex compression unit, thereby improving data transfer speed while managing device complexity through modular architecture.
Solution Approach 2:
A compression circuit is introduced as an intermediary component between the nonvolatile memory device and the controller. This intermediary compresses the soft-bit data before transmission, increasing effective data transfer speed and bandwidth utilization without requiring the controller itself to implement complex compression logic.
2Productivity
If a high compression ratio is applied to soft-bit data, then the data transfer efficiency is improved, but the complexity of the compression control increases
Solution Approach 1:
The compression ratio is made dynamic rather than fixed. The compression circuit can adjust its compression ratio based on data characteristics and system requirements, allowing high compression efficiency when beneficial while simplifying control when compression is less advantageous. This dynamic adjustment resolves the contradiction between achieving high compression ratios and maintaining manageable control complexity.
Solution Approach 2:
The compression ratio parameter is changed adaptively based on input data characteristics and system state. By varying this key parameter, the system achieves high data transfer efficiency when compression is effective while avoiding unnecessary complexity when the data already exhibits favorable compression characteristics or when system resources are constrained.
3Adaptability or versatility
If multiple compression stages are implemented in the nonvolatile memory device, then the compression flexibility and data transfer optimization are improved, but the device structure becomes more complex
Solution Approach 1:
The compression functionality is segmented into multiple independent compression stages, each with its own control logic and processing capability. This segmentation provides compression flexibility as each stage can be independently configured and controlled, while the modular structure manages overall device complexity by distributing the compression function across multiple simpler units rather than requiring a single complex compression engine.
Data Source
AI summary
Disclosed is a storage device, which includes a nonvolatile memory device that stores or reads user data and a controller that controls the nonvolatile memory device, and the nonvolatile memory device includes a memory cell array including a plurality of memory cells that stores data bits corresponding to the user data, a compression circuit that compresses soft-bit data sensed from the plurality of memory cells, and control logic that controls the compression circuit through a plurality of compression stages and transmits a stage control signal to the compression circuit to control whether compression on each of the plurality of compression stages is performed.


